Corrected the GhostScript license information.

llvm-svn: 11571

llvm-svn: 11567

llvm-svn: 11566

llvm-svn: 11565

the globals graph.

llvm-svn: 11562

Since tail duplication is currently neutered, we have to help the optimizer to remove the overhead of __main

llvm-svn: 11561

llvm-svn: 11560

llvm-svn: 11558

and it was only for debugging in the first place.

llvm-svn: 11557

llvm-svn: 11556

llvm-svn: 11555

representation.. duh!

llvm-svn: 11554

llvm-svn: 11552

llvm-svn: 11550

llvm-svn: 11549

bits wide.

llvm-svn: 11548

llvm-svn: 11547

MOVSX, and MOVZX.

llvm-svn: 11546

and DECm{8,16,32} instructions.

llvm-svn: 11545

llvm-svn: 11544

llvm-svn: 11543

that need them.  This is very useful on CISCy targets like the X86 because it
reduces the total spill pressure, and makes better use of it's (large)
instruction set.  Though the X86 backend doesn't know how to rewrite many
instructions yet, this already makes a substantial difference on 176.gcc for
example:

Before:
Time:
   8.0099 ( 31.2%)   0.0100 ( 12.5%)   8.0199 ( 31.2%)   7.7186 ( 30.0%)  Local Register Allocator

Code quality:
734559 asm-printer           - Number of machine instrs printed
111395 ra-local              - Number of registers reloaded
 79902 ra-local              - Number of registers spilled
231554 x86-peephole          - Number of peephole optimization performed

After:
Time:
   7.8700 ( 30.6%)   0.0099 ( 19.9%)   7.8800 ( 30.6%)   7.7892 ( 30.2%)  Local Register Allocator
Code quality:
733083 asm-printer           - Number of machine instrs printed
  2379 ra-local              - Number of reloads fused into instructions
109046 ra-local              - Number of registers reloaded
 79881 ra-local              - Number of registers spilled
230658 x86-peephole          - Number of peephole optimization performed

So by fusing 2300 instructions, we reduced the  static number of instructions
by 1500, and reduces the number of peepholes (and thus the work) by about 900.
This also clearly reduces the number of reload/spill instructions that are
emitted.

llvm-svn: 11542

llvm-svn: 11541

llvm-svn: 11540

like compares and test's would be the next huge win...

llvm-svn: 11539

llvm-svn: 11538

llvm-svn: 11537

but the memory reference is full sized.

llvm-svn: 11536

llvm-svn: 11535

llvm-svn: 11534

llvm-svn: 11533

llvm-svn: 11532

llvm-svn: 11531

order in the correct sense!! Arg!

llvm-svn: 11530

'ri' ordering instead... no it's not possible to store a register into an
immediate!

llvm-svn: 11529

llvm-svn: 11528

llvm-svn: 11527

llvm-svn: 11526

llvm-svn: 11525

llvm-svn: 11524