The idea is that you can create a VarDecl with an unknown type, or a
FunctionDecl with an unknown return type, and it will still be valid to
access that object as long as you explicitly cast it at every use.  I'm
still going back and forth about how I want to test this effectively, but
I wanted to go ahead and provide a skeletal implementation for the LLDB
folks' benefit and because it also improves some diagnostic goodness for
placeholder expressions.

llvm-svn: 129065

llvm-svn: 129053

llvm-svn: 129052

tokenization to crash and burn.

llvm-svn: 129051

rdar://problem/9246844

llvm-svn: 129050

is equivalent to any other relevant value; it isn't true in general.
If it is equivalent, the LoopPromoter will tell the AST the equivalence.
Also, delete the PreheaderLoad if it is unused.

Chris, since you were the last one to make major changes here, can you check
that this is sane?

llvm-svn: 129049

with debug info.]

Use CharUnits for the offsets in the VirtualBaseClassOffsetOffsetsMapTy. No
change in functionality intended.

llvm-svn: 129048

The ARM disassembler was not recognizing USADA8 instruction.  Need to add checking for register values
for USAD8 and USADA8.

rdar://problem/9247060

llvm-svn: 129047

info.]

Use CharUnits for the offset type in the ClassNamesAndOffsets map in
dumpLayout(). No change in functionality intended.

llvm-svn: 129046

llvm-svn: 129045

llvm-svn: 129044

Use CharUnits for the offsets in the VBaseOffsetOffsetsMapTy types. No
change in functionality intended.

llvm-svn: 129043

rdar://problem/9246650

llvm-svn: 129042

llvm-svn: 129041

llvm-svn: 129040

llvm-svn: 129039

Teach the ARM peephole optimizer that RSB, RSC, ADC, and SBC can be used for folded comparisons, just like ADD and SUB.

llvm-svn: 129038

Translate dwarf register numbers to internal register numbers
before trying to look them up in register contexts, in the 
emulation callback functions that read & write the frame registers.

llvm-svn: 129037

llvm-svn: 129036

llvm-svn: 129035

llvm-svn: 129034

The ARM disassembler should reject invalid (type, align) encodings as invalid instructions.

So, instead of:
Opcode=1641 Name=VST2b32_UPD Format=ARM_FORMAT_NLdSt(30)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 1: 1|
-------------------------------------------------------------------------------------------------

	vst2.32	{d0, d2}, [r3, :256], r3

we now have:
Opcode=1641 Name=VST2b32_UPD Format=ARM_FORMAT_NLdSt(30)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 1: 1|
-------------------------------------------------------------------------------------------------

mc-input.txt:1:1: warning: invalid instruction encoding
0xb3 0x9 0x3 0xf4
^

llvm-svn: 129033

llvm-svn: 129032

llvm-svn: 129030

Without any positive bias, there is nothing for the spill placer to to. It will
spill everywhere.

llvm-svn: 129029

llvm-svn: 129028

Since these "Advanced SIMD and VFP" instructions have more specfic encoding bits
specified, if coproc == 10 or 11, we should reject the insn as invalid.

rdar://problem/9239922
rdar://problem/9239596

llvm-svn: 129027

so I'm killing it.

llvm-svn: 129026

llvm-svn: 129025

llvm-svn: 129024

If there are no positive nodes, the algorithm can be aborted early.

llvm-svn: 129021

This will allow us to abort the algorithm early if it is determined to be futile.

llvm-svn: 129020

llvm-svn: 129019

llvm-svn: 129018

llvm-svn: 129017

types such that protocols are seached first. Fixes
// rdar://9224670

llvm-svn: 129016

Also set the encoding bits (for A8.6.303, A8.6.328, A8.6.329) Inst{3-0} = 0b0000,
in class NVLaneOp.

rdar://problem/9240648

llvm-svn: 129015

Patch by Bobby Powers

llvm-svn: 129014

llvm-svn: 129013

llvm-svn: 129012