llvm-svn: 196536

It works with clang, but GCC has different rules so we can't make all of those
hidden. This reverts commit r190534.

llvm-svn: 190536

Worth 100k on a linux/x86_64 Release+Asserts clang.

llvm-svn: 190534

When tryEvict() is looking for a cheaper register in the allocation
order, skip the tail of too expensive registers when possible.

llvm-svn: 172281

Allow the central functions to be inlined, and use the argumentless
isHint() function when possible.

llvm-svn: 169319

missed in the first pass because the script didn't yet handle include
guards.

Note that the script is now able to handle all of these headers without
manual edits. =]

llvm-svn: 169224

This simplifies the hinting code quite a bit while making the targets
easier to write at the same time.

llvm-svn: 169173

This saves a bit of memory.

llvm-svn: 168852

llvm-svn: 148825

Only target-dependent hints require callbacks. The RCI allocation order
has CSR aliases last according to their order of appearance in the
getCalleeSavedRegs list. This can depend on the calling convention.

This way, AllocationOrder::next doesn't have to check for reserved
registers, and CSRs are always allocated last, even with weird calling
conventions.

llvm-svn: 132690

of reserved registers.

Use RegisterClassInfo in RABasic as well. This slightly changes som
allocation orders because RegisterClassInfo puts CSR aliases last.

llvm-svn: 132581

llvm-svn: 126463

registers for a given virtual register.

Reserved registers are filtered from the allocation order, and any valid hint is
returned as the first suggestion.

For target dependent hints, a number of arcane target hooks are invoked.

llvm-svn: 121497