llvm-svn: 25046

support which is fragile.
* Fixed a number of bugs.

llvm-svn: 24996

  either an operand or a result.
* Fixed some more flag / chain bugs.

llvm-svn: 24933

llvm-svn: 24753

llvm-svn: 24715

the same type as the pointer type for a target.

llvm-svn: 24649

  it has more than one real use (non-chain uses).
* Record folded chain producing node in CodeGenMap.
* Do not fold a chain producing node if it has already been selected as an
  operand of a chain use.

llvm-svn: 24647

llvm-svn: 24643

functions can return false and causing the instruction pattern match to fail.
* Code clean up.

llvm-svn: 24642

matching code that is not currently auto-generated by tblgen, e.g. X86
addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4.

llvm-svn: 24634

* Enhanced tblgen to handle instructions which have chain operand and writes a
chain result.
* Enhanced tblgen to handle instructions which produces no results. Part of
the change is a temporary hack which relies on instruction property (e.g.
isReturn, isBranch). The proper fix would be to change the .td syntax to
separate results dag from ops dag.

llvm-svn: 24587

def SHL8rCL  : I<0xD2, MRM4r, (ops R8 :$dst, R8 :$src),
                 "shl{b} {%cl, $dst|$dst, %CL}",
                 [(set R8:$dst, (shl R8:$src, CL))]>, Imp<[CL],[]>;

This generates a CopyToReg operand and added its 2nd result to the shl as
a flag operand.

llvm-svn: 24557

ValueType from the RegisterClass or Operands.  This step is necessary to
allow RegisterClasses to have multiple ValueTypes.

llvm-svn: 24555

define:

def : Pat<(i1 1), (CMPEQ r0, r0)>;

llvm-svn: 24149

tblgen: In ZAPNOTi: Cannot use 'IZAPX' in an input pattern!
for a bad pattern, instead of an ugly assertion.

llvm-svn: 23854

instead of a happy error message

llvm-svn: 23816

SelectNodeTo instead of getTargetNode when possible.

llvm-svn: 23758

Overall, no functionality change yet though.

llvm-svn: 23729

llvm-svn: 23725

1. If an operation has to be int or fp and the target only supports one
   int or fp type, relize that the op has to have that type.
2. If a target has operations on multiple types, do not emit matching code
   for patterns involving those operators, since we do not emit the code to
   check for them yet.  This prevents PPC from generating FP ops currently.

Also move some code around into more logical places.

llvm-svn: 23724

doesn't have to specify them manually.  It currently handles associativity,
e.g. knowing that (X*Y)+Z  also matches  X+(Y*Z)  and will be extended in
the future.

It is smart enough to not introduce duplicate patterns or patterns that can
never match.

llvm-svn: 23526

llvm-svn: 23502

Currently we check that immediate values live on the RHS of commutative
operators.  Defining ORI like this, for example:

def ORI   : DForm_4<24, (ops GPRC:$dst, GPRC:$src1, u16imm:$src2),
                    "ori $dst, $src1, $src2",
                    [(set GPRC:$dst, (or immZExt16:$src2, GPRC:$src1))]>;

results in:

tblgen: In ORI: Instruction can never match: Immediate values must be on the RHS of commutative operators!
llvm-svn: 23501

llvm-svn: 23499

Fix a few corner cases parsing things like (i32 imm:$foo)

llvm-svn: 23417

(e.g. things like rotates).

llvm-svn: 23416

This does not check that types match yet, but PPC only has one integer type
;-).

This also doesn't have the code to build the resultant dag.

llvm-svn: 23414

llvm-svn: 23413

llvm-svn: 23412

xforms.  Run type inference on result patterns, so we always have fully typed
results (and to catch errors in .td files).

llvm-svn: 23369

llvm-svn: 23368

returned.

llvm-svn: 23367

llvm-svn: 23364

functions to preserve the Record for the xform instead of making it into a
function name.

llvm-svn: 23361

verifying information about the operands.

llvm-svn: 23353

llvm-svn: 23346

llvm-svn: 23345

'set's.

llvm-svn: 23343

llvm-svn: 23338

llvm-svn: 23337