bit (Inst{22}) and the M bit (Inst{5}) should be left unspecified.  For binary
format instructions, Inst{6} and Inst{4} need to specified for proper decodings.

llvm-svn: 94855

llvm-svn: 89723

llvm-svn: 89700

llvm-svn: 89478

llvm-svn: 87054

llvm-svn: 86706

llvm-svn: 86548

llvm-svn: 86494

llvm-svn: 85410

llvm-svn: 85362

llvm-svn: 85186

ld / st pairs, etc.

llvm-svn: 83197

Change ld/st multiples to explicitly model the writeback to base register. This fixes most of the -ldstopti-before-sched2 regressions.

llvm-svn: 83191

llvm-svn: 82788

llvm-svn: 82483

llvm-svn: 78604

Add parameter to pattern classes to enable an itinerary to be specified for instructions. For now just use the existing itineraries or NoItinerary.

llvm-svn: 78321

llvm-svn: 78101

llvm-svn: 78085

Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations.

llvm-svn: 78081

llvm-svn: 76390

llvm-svn: 75254

llvm-svn: 73252

llvm-svn: 60901

llvm-svn: 60487

llvm-svn: 59344

llvm-svn: 59234

llvm-svn: 59107

llvm-svn: 59104

llvm-svn: 59102

llvm-svn: 59088

llvm-svn: 59084

llvm-svn: 59074

llvm-svn: 59016

llvm-svn: 58800

llvm-svn: 56126

Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.

llvm-svn: 48380

Move definition of 'trap' sdnode up from x86 instrinfo to targetselectiondag.td.

llvm-svn: 46017

llvm-svn: 45821

llvm-svn: 45727