llvm-svn: 25011

llvm-svn: 25010

llvm-svn: 25009

llvm-svn: 25008

llvm-svn: 25005

llvm-svn: 25004

are for function prologue.

TODO: move external symbols over to using RelLit.
    : have a pattern that matches constpool|globaladdr
    : have a pattern that matches (add x imm) -> x, imm or (...) -> ..., 0
llvm-svn: 25003

supported.  This almost completes memory operations.

llvm-svn: 25002

Lower GOT relative addresses to Lo and HI.
Update both ISels to select them when they can.
Saves instructions here and there.

llvm-svn: 25001

llvm-svn: 25000

constant offsets from statics into the address arithmetic.

llvm-svn: 24999

* Added a pseudo instruction (for each target) that represent "return void".
  This is a workaround for lack of optional flag operand (return void is not
  lowered so it does not have a flag operand.)

llvm-svn: 24997

llvm-svn: 24991

llvm-svn: 24990

llvm-svn: 24989

llvm-svn: 24987

llvm-svn: 24986

void test3(va_list Y);
void test2(int F, ...) {
  va_list X;
  va_start(X, F);
  test3(X);
}

into this:

test2:
        save -104, %o6, %o6
        st %i5, [%i6+88]
        st %i4, [%i6+84]
        st %i3, [%i6+80]
        st %i2, [%i6+76]
        st %i1, [%i6+72]
        add %i6, 72, %o0
        st %o0, [%i6+-4]
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

The simple isel emits:

test2:
        save -96, %o6, %o6
        st %i0, [%i6+68]
        st %i1, [%i6+72]
        st %i2, [%i6+76]
        st %i3, [%i6+80]
        st %i4, [%i6+84]
        st %i5, [%i6+88]
        or %g0, 1, %l0
        or %g0, 4, %l1
        umul %l0, %l1, %l0
        add %l0, 7, %l0
        and %l0, -8, %l0
        sub %o6, %l0, %o6
        add %o6, 96, %l0
        add %i6, 72, %l1
        st %l1, [%l0]
        ld [%l0], %o0
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24985

llvm-svn: 24984

llvm-svn: 24979

llvm-svn: 24978

to represent the int part (because it's always 32-bits)

llvm-svn: 24976

llvm-svn: 24975

llvm-svn: 24974

llvm-svn: 24967

llvm-svn: 24965

llvm-svn: 24964

llvm-svn: 24956

whimper out of doing things the Right Way, and hack up a generic
'BRCALL' instruction, that gets generated when calls are lowered.
This gets selected by hand in the DAG isel, where it gets turned
into real (i.e. in tablegen) br.call instructions.

BUG: this dies on void calls, but seems to work otherwise?
llvm-svn: 24952

llvm-svn: 24951

llvm-svn: 24950

llvm-svn: 24948

BUG: calling printf(string, float) will load the float into the wrong
register, completely forget about loading the string, etce

llvm-svn: 24947

to IA64ISD

llvm-svn: 24946

i.e. r1/r12/rp are saved/restored regardless of scheduling/luck

TODO: calls to external symbols, indirect (function descriptor) calls,
      performance (we're being paranoid right now)

BUG: the code for handling calls to vararg functions breaks if FP
args are passed (this will make printf() go haywire so a bunch of
tests will fail)

BUG: this seems to trigger some legalize nastiness
llvm-svn: 24942

SPARCv8. (we copy sparcv8's workaround for tablegen not being nice about
ISD::CALL/TAILCALL)

llvm-svn: 24941

llvm-svn: 24939

llvm-svn: 24935

llvm-svn: 24934

llvm-svn: 24922