llvm-svn: 128736

llvm-svn: 128735

Fix a LDRT/LDRBT decoding bug where for Encoding A2, if Inst{4} != 0, we should reject the instruction
as invalid.

llvm-svn: 128734

llvm-svn: 128733

int test1(unsigned x) { return (x&8) ? 0 : -1; }
int test3(unsigned x) { return (x&8) ? -1 : 0; }

before (x86_64):
_test1:
	andl	$8, %edi
	cmpl	$1, %edi
	sbbl	%eax, %eax
	ret
_test3:
	andl	$8, %edi
	cmpl	$1, %edi
	sbbl	%eax, %eax
	notl	%eax
	ret

after:
_test1:
	shrl	$3, %edi
	andl	$1, %edi
	leal	-1(%rdi), %eax
	ret
_test3:
	shll	$28, %edi
	movl	%edi, %eax
	sarl	$31, %eax
	ret

llvm-svn: 128732

llvm-svn: 128731

llvm-svn: 128730

Assign node order numbers to results of call instruction lowering. This should improve src line debug info when sdisel is used. rdar://9199118

llvm-svn: 128728

with the contents of CMAKE_C(XX)_FLAGS too, else `llvm-config
--c(xx)flags' doesn't tell the absolute truth.

This comes from PR9603 and is based on a patch by Ryuta Suzuki!

llvm-svn: 128727

__byref block. // rdar://9204669

llvm-svn: 128726

llvm-svn: 128725

Modifies MipsAsmPrinter::isBlockOnlyReachableByFallthrough so that it handles delay slots correctly.

llvm-svn: 128724

llvm-svn: 128723

Fix LDRi12 immediate operand, which was changed to be the second operand in $addrmode_imm12 => (ops GPR:$base, i32imm:$offsimm).

rdar://problem/9219356

llvm-svn: 128722

llvm-svn: 128721

respectively.

llvm-svn: 128720

Patch by arrowdoger.

llvm-svn: 128719

llvm-svn: 128718

llvm-svn: 128709

list of operands. Simplify and rename them accordingly.

llvm-svn: 128708

llvm-svn: 128707

llvm-svn: 128706

had gotten out of sync: isCastable didn't think it was possible to
cast the x86_mmx type to anything, while it did think it possible
to cast an i64 to x86_mmx.

llvm-svn: 128705

Add annotations to tablegen-generated processor itineraries, or replace them with something meaningful. I want to be able to read and debug the generated tables.

llvm-svn: 128703

location into a TemplateSpecializationTypeLoc. These were found using
a hand-written program to inspect every source location in
TemplateSpecializationTypeLocs and Valgrind. I don't know of any way to
test them in Clang's existing test suite sadly.

Example code that triggers the ElaboratedType case:
  template <typename T> struct X1 {
    template <typename U> struct X1_1 {
      int x;
    };
  };

  template <typename T, typename U> struct X2 {
    typename X1<T>::template X1_1<U> B;
  };

  X2<char, int> x2;

The other fix was simply spotted by inspection. I audited all constructions of
[Dependent]TemplateSpecializationTypeLocs in TreeTransform.h, and the rest set
the TemplateNameLoc properly.

llvm-svn: 128702

llvm-svn: 128701

that of the array element type.

llvm-svn: 128698

llvm-svn: 128697

rdar://8911343

llvm-svn: 128696

  lldb::SymbolType SBSymbol::GetType();

  lldb::SectionType SBAddress::GetSectionType ();
  lldb::SBModule SBAddress::GetModule ();

Also add an lldb::SBModule::GetUUIDString() API which is easier for Python
to work with in the test script.

llvm-svn: 128695

event.

Modified the ProcessInfo structure to contain all process arguments. Using the
new function calls on MacOSX allows us to see the full process name, not just
the first 16 characters. 

Added a new platform command: "platform process info <pid> [<pid> <pid> ...]"
that can be used to get detailed information for a process including all 
arguments, user and group info and more.

llvm-svn: 128694

arrays by propagating", it's breaking test in ways I don't understand yet.

llvm-svn: 128693

llvm-svn: 128692

the array alignment to the array access.
 - This is more or less the best we can do without having alignment present in
   the type system, but is a long way from truly matching how GCC handles this.

llvm-svn: 128691

llvm-svn: 128690

all LDR/STR changes and left them to a future patch. Passing all
checks now.

- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
  fix the encoding wherever is possible.
- Add a new encoding bit to describe the index mode used and teach
  printAddrMode2Operand to check by the addressing mode which index
  mode to print.
- Testcases

llvm-svn: 128689

It is using a trivial rewriter that doesn't know how to insert spill code
requested by the standard spiller.

llvm-svn: 128688

The LocalStackSlotAllocation pass was creating illegal registers.

llvm-svn: 128687

llvm-svn: 128686

llvm-svn: 128685