llvm-svn: 89702

no filename. This situation is apparently fairly common right now.

llvm-svn: 89701

llvm-svn: 89686

llvm-svn: 89683

SelectionDAGBuild.cpp to SelectionDAGBuilder.cpp.

llvm-svn: 89681

in this file.

llvm-svn: 89675

FunctionLoweringInfo.cpp.

llvm-svn: 89674

llvm-svn: 89671

of SelectionDAGBuild.h/cpp into its own files, to help separate
general lowering logic from SelectionDAG-specific lowering logic.

llvm-svn: 89667

llvm-svn: 89645

tell debug info which base register to use to reference a frame index on a
per-index basis. This is useful, for example, in the presence of dynamic
stack realignment when local variables are indexed via the stack pointer and
stack-based arguments via the frame pointer.

llvm-svn: 89620

llvm-svn: 89612

Teach MachineBasicBlock::updateTerminator() to handle a failing TII->ReverseBranchCondition(Cond) call.

This fixes the MallocBench/cfrac test case regression.

llvm-svn: 89608

llvm-svn: 89567

Allow target to disable if-converting predicable instructions. e.g. NEON instructions under ARM mode.

llvm-svn: 89541

llvm-svn: 89537

llvm-svn: 89536

When splitting a critical edge, the registers live through the edge are:

- Used in a PHI instruction, or
- Live out from the predecessor, and
- Live in to the successor.

This allows the coalescer to eliminate even more phi joins.

llvm-svn: 89530

llvm-svn: 89522

and stores, handle the case where the element size is not
a valid target type correctly (PPC).

llvm-svn: 89521

DIEs are created from MDNode, which are already uniqued. And DwarfDebug already uses ValueMaps to find and use existing DIE for a given MDNode.

llvm-svn: 89518

llvm-svn: 89511

llvm-svn: 89510

and support for blockaddresses in x86-32 PIC mode.

llvm-svn: 89506

Use ValueMap, instead of std::map.

llvm-svn: 89490

Cleanups.

Make things a little more efficient as suggested by Evan.

llvm-svn: 89489

llvm-svn: 89487

llvm-svn: 89477

Remove some old experimental code that is no longer needed. Remove additional, speculative scheduling pass as its cost did not translate into significant performance improvement. Minor tweaks.

llvm-svn: 89471

llvm-svn: 89470

which was an expensive checks failure due to a bug in the checking.  This
patch in essence reverts the original fix for PR3393, and refixes it by a
tweak to the way expensive checking is done.

llvm-svn: 89454

tail call has been encountered.

llvm-svn: 89444

just before codegen.

llvm-svn: 89439

Fix debug code that assumes getBasicBlock never returns NULL.

llvm-svn: 89428

llvm-svn: 89422

llvm-svn: 89404

critical edges in PHIElimination.

This has a huge impact on regalloc performance, and we recover almost all of
the 10% compile time regression that edge splitting introduced.

llvm-svn: 89381

$ svn merge -c -89279 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r89279 into '.':
U    lib/CodeGen/AsmPrinter/DwarfException.cpp
U    lib/Target/TargetLoweringObjectFile.cpp
$ svn merge -c -89270 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r89270 into '.':
G    lib/CodeGen/AsmPrinter/DwarfException.cpp
G    lib/Target/TargetLoweringObjectFile.cpp

llvm-svn: 89379

Fix a small bug.

Fix one case we missed to make sure we reserve registers from
allocation.

llvm-svn: 89376

Add support for spreading register allocation.

Add a -linearscan-skip-count argument (default to 0) that tells the
allocator to remember the last N registers it allocated and skip them
when looking for a register candidate.  This tends to spread out
register usage and free up post-allocation scheduling at the cost of
slightly more register pressure.  The primary benefit is the ability
to backschedule reloads.

This is turned off by default.

llvm-svn: 89356