llvm-svn: 37651

with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.

llvm-svn: 37644

llvm-svn: 37643

llvm-svn: 37640

llvm-svn: 37634

llvm-svn: 37633

by making it non-recursive

llvm-svn: 37629

llvm-svn: 37626

llvm-svn: 37623

1. Consider all possible ifcvt cases at once. No longer restricted to bottom
   up iterative approach.
2. Sort all possible cases based on a cost function. Perform the most profitable
   ones first invalidate others that target the same blocks.
3. Fixed a number of bugs related to block duplication.

llvm-svn: 37613

llvm-svn: 37608

llvm-svn: 37607

for tied register constraints.

llvm-svn: 37601

llvm-svn: 37599

llvm-svn: 37597

llvm-svn: 37593

llvm-svn: 37590

llvm-svn: 37581

If BB is predicated, invalidate its predecessor(s) which would if-convert it. It needs to be re-analyzed.

llvm-svn: 37580

llvm-svn: 37579

llvm-svn: 37577

implementation for x86.

llvm-svn: 37576

llvm-svn: 37575

turned on.  Likewise for scanning of invokes to mark landing pads.

llvm-svn: 37570

VCONCAT_VECTORS. Use these for CopyToReg and CopyFromReg legalizing in
the case that the full register is to be split into subvectors instead
of scalars. This replaces uses of VBIT_CONVERT to present values as
vector-of-vector types in order to make whole subvectors accessible via
BUILD_VECTOR and EXTRACT_VECTOR_ELT.

This is in preparation for adding extended ValueType values, where
having vector-of-vector types is undesirable.

llvm-svn: 37569

correct types for the result vector, even though it is currently bitcasted
to a different type immediately.

llvm-svn: 37568

crashing but breaks exception handling.  The problem
described in PR1224 is that invoke is a terminator that
can produce a value.  The value may be needed in other
blocks.  The code that writes to registers values needed
in other blocks runs before terminators are lowered (in
this case invoke) so asserted because the value was not
yet available.  The fix that was applied was to do invoke
lowering earlier, before writing values to registers.

The problem this causes is that the code to copy values
to registers can be output after the invoke call.  If
an exception is raised and control is passed to the
landing pad then this copy-code will never execute.  If
the value is needed in some code path reached via the
landing pad then that code will get something bogus.

So revert the original fix and simply skip invoke values
in the general copying to registers code.  Instead copy
the invoke value to a register in the invoke lowering code.

llvm-svn: 37567

llvm-svn: 37566

llvm-svn: 37565

llvm-svn: 37544

llvm-svn: 37543

llvm-svn: 37537

llvm-svn: 37531

llvm-svn: 37529

llvm-svn: 37524

llvm-svn: 37523

simultaneously.  Move that pass to SimpleRegisterCoalescing.

This makes it easier to implement alternative register allocation and
coalescing strategies while maintaining reuse of the existing live
interval analysis.

llvm-svn: 37520

llvm-svn: 37518

how much will be used.

llvm-svn: 37515

llvm-svn: 37511