knows how to print offsets.

llvm-svn: 45457

llvm-svn: 45456

llvm-svn: 45455

llvm-svn: 45454

machineinstr that owns it.

llvm-svn: 45449

llvm-svn: 45432

llvm-svn: 45428

llvm-svn: 45418

MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.

llvm-svn: 44104

llvm-svn: 42945

(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.

llvm-svn: 42899

isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958

are strict about such things.

llvm-svn: 41956

llvm-svn: 40514

llvm-svn: 37599

llvm-svn: 37341

llvm-svn: 37121

llvm-svn: 37064

llvm-svn: 36618

llvm-svn: 36483

llvm-svn: 35363

llvm-svn: 34512

llvm-svn: 34428

Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.

llvm-svn: 34399

llvm-svn: 34380

llvm-svn: 34343

llvm-svn: 32622

llvm-svn: 32617

now cerr, cout, and NullStream resp.

llvm-svn: 32298

llvm-svn: 32273

- Remove the ugly TargetInstrDescriptors hack.

llvm-svn: 32032

llvm-svn: 31985

llvm-svn: 31957

of opcode and number of operands.

llvm-svn: 31947

instruction.  Doing so breaks the FP stackifier, the alpha branch selector
the sparc fpmover.

This fixes PR1012 and CodeGen/X86/fp-stack-compare.ll

llvm-svn: 31876

llvm-svn: 31761

  will be inserted before these operands. If the opcode changes (by
  setOpcode), the implicit operands are updated as well.
- Added IsKill, IsDead fields to MachineOperand in preparation for changes
  that move kill / dead info to MachineInstr's.

llvm-svn: 31711

llvm-svn: 31675

llvm-svn: 31633

llvm-svn: 31179