to SHIFT_PARTS nodes

llvm-svn: 23151

at least tends to expose problems elsewhere.

llvm-svn: 23149

llvm-svn: 23148

them.  This allows for elminination of redundant extends in the entry
blocks of functions on PowerPC.

Add support for i32 x i32 -> i64 multiplies, by recognizing when the inputs
to ISD::MUL in ExpandOp are actually just extended i32 values and not real
i64 values.  this allows us to codegen

int mulhs(int a, int b) { return ((long long)a * b) >> 32; }
as:
_mulhs:
        mulhw r3, r4, r3
        blr

instead of:
_mulhs:
        mulhwu r2, r4, r3
        srawi r5, r3, 31
        mullw r5, r4, r5
        add r2, r2, r5
        srawi r4, r4, 31
        mullw r3, r4, r3
        add r3, r2, r3
        blr

with a similar improvement on x86.

llvm-svn: 23147

llvm-svn: 23145

llvm-svn: 23144

token chains first.  For this C function:

int test() {
  int i;
  for (i = 0; i < 100000; ++i)
    foo();
}

Instead of emitting this (condition before call)

.LBB_test_1:    ; no_exit
        addi r30, r30, 1
        lis r2, 1
        ori r2, r2, 34464
        cmpw cr2, r30, r2
        bl L_foo$stub
        bne cr2, .LBB_test_1    ; no_exit

Emit this:

.LBB_test_1:    ; no_exit
        bl L_foo$stub
        addi r30, r30, 1
        lis r2, 1
        ori r2, r2, 34464
        cmpw cr0, r30, r2
        bne cr0, .LBB_test_1    ; no_exit

Which makes it so we don't have to save/restore cr2 in the prolog/epilog of
the function.

This also makes the code much more similar to what the pattern isel produces.

llvm-svn: 23135

llvm-svn: 23131

llvm-svn: 23130

llvm-svn: 23129

Olden/bisort among others.

llvm-svn: 23124

llvm-svn: 23122

llvm-svn: 23114

llvm-svn: 23113

llvm-svn: 23110

changes the code generated for:

short %test(short %A) {
  %B = xor short %A, -32768
  ret short %B
}

to:

_test:
        xori r2, r3, 32768
        xoris r2, r2, 65535
        extsh r3, r2
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 16, 31
        xori r2, r3, 32768
        xoris r2, r2, 65535
        extsh r3, r2
        blr

llvm-svn: 23109

llvm-svn: 23108

register class.

llvm-svn: 23103

flag is set on an instruction.

llvm-svn: 23098

llvm-svn: 23087

putting it into the constant pool.  This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.

llvm-svn: 23081

every other SD API.  Fix it to take the opcode before the types.

llvm-svn: 23079

llvm-svn: 23074

llvm-svn: 23071

some things given to it, but not all.

llvm-svn: 23070

llvm-svn: 23069

llvm-svn: 23058

llvm-svn: 23055

llvm-svn: 23054

llvm-svn: 23053

llvm-svn: 23050

llvm-svn: 23041

llvm-svn: 23035

llvm-svn: 23027

Add some foldings to hopefully help the illegal setcc issue, and move some code around.

llvm-svn: 23025

llvm-svn: 23022

llvm-svn: 23021

select.  Also teach it that the bit count instructions can only set the low bits
of the result, depending on the size of the input.

This allows us to compile this:

int %eq0(int %a) {
        %tmp.1 = seteq int %a, 0                ; <bool> [#uses=1]
        %tmp.2 = cast bool %tmp.1 to int                ; <int> [#uses=1]
        ret int %tmp.2
}

To this:

_eq0:
        cntlzw r2, r3
        srwi r3, r2, 5
        blr

instead of this:

_eq0:
        cntlzw r2, r3
        rlwinm r3, r2, 27, 31, 31
        blr

when setcc is marked illegal on ppc (which restores parity to non-illegal
setcc).  Thanks to Nate for pointing this out.

llvm-svn: 23013

llvm-svn: 23012

nodes so that backends don't have to.

llvm-svn: 22999