llvm-svn: 105775

This is a bit of a hack to make inline asm look more like call instructions.
It would be better to produce correct dead flags during isel.

llvm-svn: 105749

llvm-svn: 105665

replace an OpA with a widened OpB, it is possible to get new uses of OpA due to CSE
when recursively updating nodes.  Since OpA has been processed, the new uses are
not examined again.  The patch checks if this occurred and it it did, updates the
new uses of OpA to use OpB.

llvm-svn: 105453

needs to demand the high bits because it's asserting that they're zero.

llvm-svn: 105406

expansion is the same as that used by LegalizeDAG.

The resulting code sucks in terms of performance/codesize on x86-32 for a
64-bit operation; I haven't looked into whether different expansions might be
better in general.

llvm-svn: 105378

Radar 7927666.

llvm-svn: 105285

llvm-svn: 105283

that are too large.  This causes the freebsd bootloader to be too
large apparently.

It's unclear if this should be an -Os or -Oz thing.  Thoughts welcome.

llvm-svn: 105228

llvm-svn: 105226

llvm-svn: 105168

llvm-svn: 105105

shouldn't have a TargetLoweringInfo member. And FunctionLoweringInfo::set
doesn't needs its EnableFastISel argument.

llvm-svn: 105101

llvm-svn: 105061

This will help reduce the amount of casting required on 64-bit targets.

llvm-svn: 104911

an alloca() or an llvm.stackrestore(). rdar://8031573

llvm-svn: 104900

llvm-svn: 104897

llvm-svn: 104869

llvm-svn: 104749

usual suspects that could "return twice".

llvm-svn: 104737

ISD::. No functional change.

llvm-svn: 104734

llvm-svn: 104732

more than just the stack slot coloring algorithm.

llvm-svn: 104722

implementing pop with a linear search for a "best" element. The priority
queue was a neat idea, but in practice the comparison functions depend
on dynamic information.

llvm-svn: 104718

llvm-svn: 104716

llvm-svn: 104664

base class, since all the implementations are the same.

llvm-svn: 104659

llvm-svn: 104657

machine code generation. That's a good idea, so I made it so.

llvm-svn: 104655

llvm-svn: 104645

Mon Ping provided; unfortunately bugpoint failed to
reduce it, but I think it's important to have a test for
this in the suite.  8023512.

llvm-svn: 104624

(oye, a word which should be better known to people writing tree
traversals, means grandchild.)

llvm-svn: 104619

Followups: docs patch for the builtin and eh.sjlj.setjmp cleanup to match
longjmp.

llvm-svn: 104419

llvm-svn: 104410

so that it will continue to test what it was meant to test when I commit a
separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon.
Fix a DAG combiner crash exposed by this test change.

llvm-svn: 104380

llvm-svn: 104306

Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode.

llvm-svn: 104293

pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot
of long latency instructions so a strict register pressure reduction
scheduler does not work well.
Early experiments show this speeds up some NEON loops by over 30%.

llvm-svn: 104216

test/Codegen/ARM/reg_sequence.ll but it doesn't affect the generated code
because the coalescer cleans it up.  Radar 7998853.

llvm-svn: 104185

llvm-svn: 104173