llvm-svn: 116625

llvm-svn: 116622

llvm-svn: 116612

llvm-svn: 116604

scheduler may reorder loads from them before the stores and other such
badness. PR8347. Patch by David Meyer

llvm-svn: 116602

llvm-svn: 116601

llvm-svn: 116594

an explicit def. Make sure to capture that properly. rdar://8556556

llvm-svn: 116591

llvm-svn: 116588

llvm-svn: 116566

have been printed with the "S" modifier after the predicate.  With ARM's
unified syntax, they are supposed to go in the other order.  We fixed this
for Thumb when we switched to unified syntax but missed changing it for
ARM.  Apparently we don't generate these instructions often because no one
noticed until now.  Thanks to Bill Wendling for the testcase!

llvm-svn: 116563

llvm-svn: 116560

llvm-svn: 116537

and let the ARMExpandPseudoInsts pass fix them up into the real (MOVs)
instruction form.

llvm-svn: 116534

pseudonym.

llvm-svn: 116512

llvm-svn: 116498

llvm-svn: 116488

creates a cyclic dependency that breaks the build when
BUILD_SHARED_LIBS=ON

llvm-svn: 116480

GEP + alloca.

llvm-svn: 116474

here. The f32 in FCONSTS is handled as a double instead of a float in the
code. So the encoding of the immediate into the instruction isn't exactly in
line with the documentation in that regard. But given that we know it's handled
as a double, it doesn't cause any harm.

llvm-svn: 116471

llvm-svn: 116466

- Add missing patterns for some multiply add/subtract instructions.
- Add encodings for VMRS and VMSR.

llvm-svn: 116464

llvm-svn: 116459

llvm-svn: 116454

llvm-svn: 116451

llvm-svn: 116450

llvm-svn: 116449

llvm-svn: 116447

llvm-svn: 116444

llvm-svn: 116440

llvm-svn: 116438

llvm-svn: 116437

and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.

llvm-svn: 116432

llvm-svn: 116431

llvm-svn: 116428

wfi, sel, sev and bkpt. All would disassemble properly before, but more
explicitness is good, especially with the integrated assembler coming in
the future.

llvm-svn: 116427

llvm-svn: 116421

llvm-svn: 116414

llvm-svn: 116412

immediates instead of 8 bits ones.

llvm-svn: 116410