the LHS for null twice.

llvm-svn: 49138

llvm-svn: 49137

llvm-svn: 49136

llvm-svn: 49135

BFS path to the root.  This also avoids problems with loops in the ExplodedGraph.

llvm-svn: 49133

the graph.

llvm-svn: 49132

llvm-svn: 49129

llvm-svn: 49128

"BugReporter" and "BugDescription".  BugDescription is used to describe
a bug and provide pieces of the PathDiagnostic, and BugReporter creates
the actual PathDiagnostic by crawling through the ExplodedGraph.

Migrated checks done by GRSimpleVals to be reported using the new BugReporter
mechanism.

llvm-svn: 49127

double includes.

llvm-svn: 49126

llvm-svn: 49124

CodeGenDAGPatterns, where it can be used in other tablegen backends.
This allows the inference to be done for DAGISelEmitter so that it
gets accurate mayLoad/mayStore/isSimpleLoad flags. 

This brings MemOperand functionality back to where it was before
48329. However, it doesn't solve the problem of anonymous patterns
which expand to code that does loads or stores.

llvm-svn: 49123

it causes compile errors.

llvm-svn: 49122

llvm-svn: 49121

llvm-svn: 49120

llvm-svn: 49119

llvm-svn: 49117

llvm-svn: 49116

llvm-svn: 49115

llvm-svn: 49114

Added line number, file information, path length, for each bug report.

llvm-svn: 49113

llvm-svn: 49112

llvm-svn: 49111

StripSymbols when EH is on.

llvm-svn: 49110

now that llvm-gcc is lowering appropriately-sized struct returns
to i128 on x86-64.

llvm-svn: 49109

Added "-V/--view" option to view index.html after it has been generated.

llvm-svn: 49108

Change ObjCInterfaceDecl to inherit from NamedDecl (not TypeDecl). While ObjCInterfaceDecl is arguably a TypeDecl, it isn't a ScopedDecl. Since TypeDecl's are scoped, it makes sense to simply treat them as NamedDecl's. I could have fiddled a bit more with the hierarchy (in terms of creating a non-scoped TypeDecl), however this probably isn't worth the effort. 

I also finished unifying access to scope decl change by converting Sema::getObjCInterfaceDecl() to use Sema::LookupDecl(). This is much cleaner now:-)

llvm-svn: 49107

Iterators folloring a SmallVector erased element are invalidated so
don't access cached iterators from after the erased element.

Re-apply 49056 with SmallVector support.

llvm-svn: 49106

Now that I am told MachineRegisterInfo also tracks physical register uses / defs, I can do away with the horribleness I introduced a while back. It's impossible to detect if there is any use of a physical register below an instruction (and before any def of the register) with some cheap book keeping.

llvm-svn: 49105

llvm-svn: 49104

llvm-svn: 49103

llvm-svn: 49102

llvm-svn: 49101

allowing them to be treated the same in some contexts.  A suggestion for a
better name is welcome :)

llvm-svn: 49100

llvm-svn: 49099

llvm-svn: 49098

llvm-svn: 49097

llvm-svn: 49096

llvm-svn: 49095

llvm-svn: 49094