llvm-svn: 19324

llvm-svn: 19321

llvm-svn: 19320

llvm-svn: 19319

llvm-svn: 19315

llvm-svn: 19313

llvm-svn: 19311

llvm-svn: 19306

llvm-svn: 19305

llvm-svn: 19303

   precisely represented as a float, put it into the constant pool as a
   float.
2. Use the cbw/cwd/cdq instructions instead of an explicit SAR for signed
   division.

llvm-svn: 19291

llvm-svn: 19289

llvm-svn: 19280

llvm-svn: 19273

llvm-svn: 19264

-  unsigned TrueValue = getReg(TrueVal, BB, BB->begin());
+  unsigned TrueValue = getReg(TrueVal);

Fixes the PPC regressions from last night.

The other hunk is just a clarity improvement.

llvm-svn: 19263

llvm-svn: 19254

to get Visual Studio to link in X86.lib to the executables that need it.  There
is another way of doing it.

llvm-svn: 19252

addition to being three address, LEA's don't set the flags.

This fixes 186.crafty.

llvm-svn: 19251

llvm-svn: 19249

llvm-svn: 19248

branches.

llvm-svn: 19247

1. Add new instructions for checking parity flags: JP, JNP, SETP, SETNP.
2. Set the isCommutable and isPromotableTo3Address bits on several
   instructions.

llvm-svn: 19246

1. If we are two-addressing a commutable instruction and the LHS is not the
   last use of the variable, see if the instruction is the last use of the
   RHS.  If so, commute the instruction, allowing us to avoid a
   register-register copy in many cases for common instructions like ADD, OR,
   AND, etc on X86.
2. If #1 doesn't hold, and if this is an instruction that also existing in
   3-address form, promote the instruction to a 3-address instruction to
   avoid the register-register copy.  We can do this for several common
   instructions in X86, including ADDrr, INC, DEC, etc.

This patch implements test/Regression/CodeGen/X86/commute-two-addr.ll,
overlap-add.ll, and overlap-shift.ll when I check in the X86 support for it.

llvm-svn: 19245

llvm-svn: 19241

llvm-svn: 19240

a terminal/console.

llvm-svn: 19237

console or not.

llvm-svn: 19236

console or not.

llvm-svn: 19233

  * We can now fold cast instructions into select instructions that
    have at least one constant operand.
  * We now optimize expressions more aggressively based on bits that are
    known to be zero.  These optimizations occur a lot in code that uses
    bitfields even in simple ways.
  * We now turn more cast-cast sequences into AND instructions.  Before we
    would only do this if it if all types were unsigned.  Now only the
    middle type needs to be unsigned (guaranteeing a zero extend).
  * We transform sign extensions into zero extensions in several cases.

This corresponds to these test/Regression/Transforms/InstCombine testcases:
  2004-11-22-Missed-and-fold.ll
  and.ll: test28-29
  cast.ll: test21-24
  and-or-and.ll
  cast-cast-to-and.ll
  zeroext-and-reduce.ll

llvm-svn: 19220

While we're at it, improve codegen of select instructions.  For this
testcase:

int %test(bool %C, int %A, int %B) {
  %D = select bool %C, int %A, int %B
  ret int %D
}

We used to generate this code:

_test:
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        b .LBB_test_3   ;
.LBB_test_2:    ;
        or r5, r4, r4
.LBB_test_3:    ;
        or r3, r5, r5
        blr

Now we emit:

_test:
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        or r4, r5, r5
.LBB_test_2:    ;
        or r3, r4, r4
        blr

-Chris

llvm-svn: 19214

In particular, instead of compiling this:

bool %test(int %A, int %B) {
  %C = setlt int %A, %B
  ret bool %C
}

to this:

test:
        save %sp, -96, %sp
        subcc %i0, %i1, %g0
        bl .LBBtest_1   !
        nop
        ba .LBBtest_2   !
        nop
.LBBtest_1:     !
        or %g0, 1, %i0
        ba .LBBtest_3   !
        nop
.LBBtest_2:     !
        or %g0, 0, %i0
        ba .LBBtest_3   !
        nop
.LBBtest_3:     !
        restore %g0, %g0, %g0
        retl
        nop

We now compile it to this:

test:
        save %sp, -96, %sp
        subcc %i0, %i1, %g0
        or %g0, 1, %i0
        bl .LBBtest_2   !
        nop
.LBBtest_1:     !
        or %g0, %g0, %i0
.LBBtest_2:     !
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 19213

SimplifyCFG is one of those passes that we use for final cleanup: it should
not rely on other passes to clean up its garbage.  This fixes the "why are
trivially dead setcc's in the output of gccas" problem.

llvm-svn: 19212

llvm-svn: 19210

llvm-svn: 19203

llvm-svn: 19202

llvm-svn: 19201

llvm-svn: 19199

llvm-svn: 19198

llvm-svn: 19190