MI->addOperand invalidates references to it's operands, avoid touching
the operand after a new one was added.

llvm-svn: 83249

llvm-svn: 83243

llvm-svn: 83242

llvm-svn: 83241

llvm-svn: 83240

llvm-svn: 83239

llvm-svn: 83237

llvm-svn: 83236

llvm-svn: 83234

llvm-svn: 83223

Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default.

llvm-svn: 83218

question, can we get rid of the BasicBlock versions of all inserters
and use Head == 0 to indicate the old case when GetInsertBlock == 0?

llvm-svn: 83216

Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string.

llvm-svn: 83215

llvm-svn: 83214

llvm-svn: 83213

Add support to extract lexical scope information from DebugLoc attached with an machine instruction. 
This is not yet enabled.

llvm-svn: 83210

Use MachineFrameInfo.getPristineRegs() to determine which callee-saved registers are available for anti-dependency breaking. Some cleanup.

llvm-svn: 83208

llvm-svn: 83207

by a capital letter, which invokes undefined behavior.

llvm-svn: 83206

Teach CMake to look for bidirectional_iterator, iterator, forward_iterator, uint64_t, and u_int64_t, from Yonggang Luo

llvm-svn: 83203

operands of instructions with these properties while breaking anti-dep.

llvm-svn: 83198

ld / st pairs, etc.

llvm-svn: 83197

set, these flags indicate the instructions source / def operands have special
register allocation requirement that are not captured in their register classes.
Post-allocation passes (e.g. post-alloc scheduler) should not change their
allocations. e.g. ARM::LDRD require the two definitions to be allocated
even / odd register pair.

llvm-svn: 83196

llvm-svn: 83194

Ok'd by Owen.

llvm-svn: 83193

llvm-svn: 83192

Change ld/st multiples to explicitly model the writeback to base register. This fixes most of the -ldstopti-before-sched2 regressions.

llvm-svn: 83191

llvm-svn: 83190

If location info is attached with an instruction then keep track of alloca slots used by a variable. This info will be used by AsmPrinter to emit debug info for variables.

llvm-svn: 83189

This will allow processDebugLoc() to handle scopes for DWARF debug info. 

llvm-svn: 83183

llvm-svn: 83182

llvm-svn: 83181

llvm-svn: 83180

Add a new TargetLoweringObjectFileMachO::getConstTextCoalSection method to
get access to that section.

llvm-svn: 83178

to emit target-specific things at the beginning of the asm output.  This
fixes a problem for PPC, where the text sections are not being kept together
as expected.  The base class doInitialization code calls DW->BeginModule()
which emits a bunch of DWARF section directives.  The PPC doInitialization
code then emits all the TEXT section directives, with the intention that they
will be kept together. But as I understand it, the Darwin assembler treats
the default TEXT section as a special case and moves it to the beginning of
the file, which means that all those DWARF sections are in the middle of
the text.  With this change, the EmitStartOfAsmFile hook is called before
the DWARF section directives are emitted, so that all the PPC text section
directives come out right at the beginning of the file.

llvm-svn: 83176

llvm-svn: 83174

llvm-svn: 83172

llvm-svn: 83171

for derived AsmPrinters to add another one.  In some cases, fixing this
removes the need to override the doInitialization method.

llvm-svn: 83170

llvm-svn: 83168