For now, only hoist re-materilizable instructions. LICM will increase register pressure. We want to avoid spilling more instructions if it's possible.

llvm-svn: 63725

llvm-svn: 63724

there.

This changes the interpreter to use libffi. After this patch, the interpreter
will barely be able to call any external functions if built on a system without
libffi installed (just enough to pass 'make check' really). But with libffi,
we can now call any function that isn't variadic or taking a struct or vector
parameter (but pointer to struct is fine). Patch by Alexei Svitkine!

llvm-svn: 63723

Finish making AliasAnalysis aware of the fact that most atomic intrinsics only dereference their arguments, and enhance
BasicAA to make use of this fact when computing ModRef info.

llvm-svn: 63718

of Lod and Sto; patch uses.

llvm-svn: 63716

would not set new values to Z.

llvm-svn: 63707

llvm-svn: 63706

functions, with callers adjusted to fit.

llvm-svn: 63705

llvm-svn: 63704

functions.

llvm-svn: 63703

of undefs and incorrectly determining if we have punpckldq.

llvm-svn: 63702

llvm-svn: 63700

llvm-svn: 63693

I think that's it for this directory.

llvm-svn: 63690

llvm-svn: 63689

llvm-svn: 63687

from SelectionDagBuild.

llvm-svn: 63680

llvm-svn: 63677

llvm-svn: 63676

llvm-svn: 63675

llvm-svn: 63674

have it yet.  More coming.

llvm-svn: 63673

Do not let dbg intrinsic block folding of two entry phi node.

llvm-svn: 63671

If "optimize for size" attribute is set then block non-trivial loop unswitches but allow trivial loop unswitches.

llvm-svn: 63670

llvm-svn: 63664

llvm-svn: 63663

llvm-svn: 63660

llvm-svn: 63659

renaming it to ConvertScalar_ExtractValue

llvm-svn: 63658

llvm-svn: 63656

llvm-svn: 63653

no functionality change.

llvm-svn: 63652

functionality change.

llvm-svn: 63651

llvm-svn: 63650

aggregate values.  loads are not yet handled (coming
soon to an sroa near you).

llvm-svn: 63649

basic-block segments bottom-up instead of top down. This
is the first step in a general restructuring of the way
register liveness is tracked in the post-RA scheduler.

llvm-svn: 63643

is given, override the subtarget settings and enable 64-bit support.
This restores the earlier behavior, and fixes regressions on
Non-64-bit-capable x86-32 hosts.

This isn't necessarily the best approach, but the most obvious
alternative is to require -mcpu=x86-64 or -mattr=+64bit to be used
with -march=x86-64 when the host doesn't have 64-bit support. This
makes things little more consistent, but it's less convenient, and
it has the practical drawback of requiring lots of test changes, so
I opted for the above approach for now.

llvm-svn: 63642

Duncan spotted this. Thanks!

llvm-svn: 63641

accessed at least once as a vector.  This prevents it from
compiling the example in not-a-vector into:

define double @test(double %A, double %B) {
	%tmp4 = insertelement <7 x double> undef, double %A, i32 0
	%tmp = insertelement <7 x double> %tmp4, double %B, i32 4
	%tmp2 = extractelement <7 x double> %tmp, i32 4
	ret double %tmp2
}

instead, producing the integer code.  Producing vectors when they
aren't otherwise in the program is dangerous because a lot of other
code treats them carefully and doesn't want to break them down.
OTOH, many things want to break down tasty i448's.

llvm-svn: 63638

and that sroa doesn't crash.

llvm-svn: 63637