llvm-svn: 30549

DLL* linkages got full (I hope) codegeneration support in C & both x86
assembler backends.
External weak linkage added for future use, we don't provide any
codegeneration, etc. support for it.

llvm-svn: 30374

llvm-svn: 30177

llvm-svn: 30162

llvm-svn: 30126

llvm-svn: 28606

llvm-svn: 28493

llvm-svn: 28324

Implement MASM sections correctly, without a "has masm sections flag" and a bunch of special case code.

llvm-svn: 28194

llvm-svn: 28190

llvm-svn: 28187

it wants it emitted to _text/_data.

llvm-svn: 28185

llvm-svn: 28184

movw. That is we promote the destination operand to r16. So
        %CH = TRUNC_R16_R8 %BP
is emitted as
        movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
        movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.

llvm-svn: 28164

llvm-svn: 28148

that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.

llvm-svn: 28119

llvm-svn: 28104

llvm-svn: 28099

llvm-svn: 28096

llvm-svn: 28093

llvm-svn: 28091

basic block labels, consolidating the code to do so in one place for each
target.

llvm-svn: 28050

llvm-svn: 28047

llvm-svn: 28046

llvm-svn: 28045

llvm-svn: 28044

llvm-svn: 28027

llvm-svn: 28021

llvm-svn: 28020

llvm-svn: 28014

x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.

llvm-svn: 27947

entry point of a function.

llvm-svn: 27494

llvm-svn: 26991

llvm-svn: 26742

- Conditionalize Dwarf debugging output (Darwin only for now).

llvm-svn: 26582

llvm-svn: 26581

and 2005-05-12-Int64ToFP.

llvm-svn: 26380

llvm-svn: 26371

1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.

llvm-svn: 26324

dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.

llvm-svn: 26315