Commits · 3d673cc3234568339bf3455e865427d9dab0cf00 · Roger Ferrer / llvm-epi-0.8

Sep 21, 2011
- Add a base class for Mips TargetMachines and add Mips64 TargetMachines. · 3d673cc3
  Akira Hatanaka authored Sep 21, 2011
```
llvm-svn: 140233
```
  3d673cc3
- Set ABI if it hasn't been set on the command line. · 6de4d121
  Akira Hatanaka authored Sep 21, 2011
```
Check if architecture & ABI combination is valid.

llvm-svn: 140230
```
  6de4d121
- Fix typo. · 6e506eb5
  Akira Hatanaka authored Sep 21, 2011
```
llvm-svn: 140229
```
  6e506eb5
- Lower ARM adds/subs to add/sub after adding optional CPSR operand. · 924123ac
  Andrew Trick authored Sep 21, 2011
```
This is still a hack until we can teach tblgen to generate the
optional CPSR operand rather than an implicit CPSR def. But the
strangeness is now limited to the selection DAG. ADD/SUB MI's no
longer have implicit CPSR defs, nor do we allow flag setting variants
of these opcodes in machine code. There are several corner cases to
consider, and getting one wrong would previously lead to nasty
miscompilation. It's not the first time I've debugged one, so this
time I added enough verification to ensure it won't happen again.

llvm-svn: 140228
```
  924123ac
- whitespace · 3f1fdf1b
  Andrew Trick authored Sep 21, 2011
```
llvm-svn: 140227
```
  3f1fdf1b
- In the disassembler C API, be careful not to confuse the comment streamer that... · 69fa8ffe
  Owen Anderson authored Sep 21, 2011
```
In the disassembler C API, be careful not to confuse the comment streamer that the disassembler outputs annotations on with the streamer that the InstPrinter will print them on.

llvm-svn: 140217
```
  69fa8ffe
- Change the names of functions isMips* to hasMips*. · bb49e721
  Akira Hatanaka authored Sep 20, 2011
```
llvm-svn: 140214
```
  bb49e721
- Revert r140097, working on a better approach · 8058234b
  Bruno Cardoso Lopes authored Sep 20, 2011
```
llvm-svn: 140203
```
  8058234b
- Simplify max/minp[s|d] dagcombine matching · f7638e1e
  Bruno Cardoso Lopes authored Sep 20, 2011
```
llvm-svn: 140199
```
  f7638e1e
Sep 20, 2011
- Tidy up a bit more, fix tab and remove trailing whitespaces · 60aa85b6
  Bruno Cardoso Lopes authored Sep 20, 2011
```
llvm-svn: 140186
```
  60aa85b6
- The wrong relocation was being emitted for several SSSE3 instructions. · 33e91a6c
  Bruno Cardoso Lopes authored Sep 20, 2011
```
This fixes PR10963. Thanks to Benjamin for finding the wrong tablegen
declaration.

llvm-svn: 140184
```
  33e91a6c
- Tidy up code! · 05f3f493
  Bruno Cardoso Lopes authored Sep 20, 2011
```
llvm-svn: 140183
```
  05f3f493
- Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does... · 61a00331
  Evan Cheng authored Sep 20, 2011
```
Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does not support Thumb2 dsp instructions. rdar://10152911.

llvm-svn: 140181
```
  61a00331
- Initial Mips64 support. Patch by Liu with some modifications. · 2b37261f
  Akira Hatanaka authored Sep 20, 2011
```
llvm-svn: 140178
```
  2b37261f
- Restore hasPostISelHook tblgen flag. · 52363bdb
  Andrew Trick authored Sep 20, 2011
```
No functionality change. The hook makes it explicit which patterns
require "special" handling. i.e. it self-documents tblgen
deficiencies. I plan to add verification in ExpandISelPseudos and
Thumb2SizeReduce to catch any missing hasPostISelHooks. Otherwise it's
too fragile.

llvm-svn: 140160
```
  52363bdb
- Extend changes from r139986 to produce 256-bit AVX minps/minpd/maxps/maxpd. · 68c92d86
  Craig Topper authored Sep 20, 2011
```
llvm-svn: 140140
```
  68c92d86
- ARM isel bug fix for adds/subs operands. · 8586e62d
  Andrew Trick authored Sep 20, 2011
```
Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the
full gamut of CPSR defs/uses including instructins whose "optional"
cc_out operand is not really optional. This allowed removal of the
hasPostISelHook to simplify the .td files and make the implementation
more robust.
Fixes rdar://10137436: sqlite3 miscompile

llvm-svn: 140134
```
  8586e62d
- whitespace · 53df4b6d
  Andrew Trick authored Sep 20, 2011
```
llvm-svn: 140133
```
  53df4b6d
- Thumb2 assembly parsing and encoding for UXTAB/UXTAB16/UXTH/UXTB/UXTB16/UXTH. · b3519802
  Jim Grosbach authored Sep 20, 2011
```
llvm-svn: 140125
```
  b3519802
- Thumb2 assembly parsing and encoding for USAX. · 716f1739
  Jim Grosbach authored Sep 20, 2011
```
llvm-svn: 140119
```
  716f1739
- Remove incorrect comments. These are not disassmebly only patterns. · 691389c9
  Jim Grosbach authored Sep 20, 2011
```
llvm-svn: 140116
```
  691389c9
- Thumb2 assembly parsing and encoding for UQASX/UQSAX. · 62f8eee0
  Jim Grosbach authored Sep 20, 2011
```
llvm-svn: 140111
```
  62f8eee0
- Thumb1 convenience aliases for disassembler round-trip testing. CPS instruction. · 08a47806
  Jim Grosbach authored Sep 20, 2011
```
llvm-svn: 140108
```
  08a47806
- Thumb CPS definition is not disassembler only. · 4da03f00
  Jim Grosbach authored Sep 20, 2011
```
llvm-svn: 140106
```
  4da03f00
- Thumb2 range check on CPS mode immediate. · d9846bbc
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140105
```
  d9846bbc
- tMOVSr is not allowed in an IT block either. · 163be01d
  Owen Anderson authored Sep 19, 2011
```
llvm-svn: 140104
```
  163be01d
- CPS instructions are UNPREDICTABLE inside IT blocks. · 61e4604d
  Owen Anderson authored Sep 19, 2011
```
llvm-svn: 140102
```
  61e4604d
- Tidy up comments. · fbb44810
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140099
```
  fbb44810
- Fix PR10949. Fix the encoding of VMOVPQIto64rr. · c4398d2c
  Bruno Cardoso Lopes authored Sep 19, 2011
```
llvm-svn: 140098
```
  c4398d2c
- Based on the small opt Zvi's patch was trying to achieve, eliminate · 51792dcc
  Bruno Cardoso Lopes authored Sep 19, 2011
```
128-bit undef subvector insertion into a 256-bit vector

llvm-svn: 140097
```
  51792dcc
- Thumb2 assembly parsing and encoding for UMAAL/UMLAL/UMULL. · fc545183
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140095
```
  fc545183
- Thumb2 assembly parsing and encoding for UHASX/UHSAX. · 15d97fd8
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140088
```
  15d97fd8
- Thumb2 assembly parsing and encoding for UASX. · a6e6504e
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140085
```
  a6e6504e
- Thumb2 TBB and TBH instructions are only allowed at the end of IT blocks, not in the middle. · f902d92f
  Owen Anderson authored Sep 19, 2011
```
llvm-svn: 140079
```
  f902d92f
- Thumb2 assembly parsing and encoding for TBB/TBH. · 05541f45
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140078
```
  05541f45
Sep 19, 2011
- Match X86ISD::FSETCCsd and X86ISD::FSETCCss while in AVX mode. This fix · d4a3d452
  Bruno Cardoso Lopes authored Sep 19, 2011
```
PR10955 and PR10948.

llvm-svn: 140069
```
  d4a3d452
- Tidy up a bit. · 1a23fbb9
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140050
```
  1a23fbb9
- Thumb2 assembly parsing and encoding for SXTB/SXTB16/SXTH. · 82213197
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140047
```
  82213197
- Make changes to avoid creating nested CALLSEQ_START/END constructs, which aren't · 79738336
  Akira Hatanaka authored Sep 19, 2011
```
yet legal according to comments in LegalizeDAG.cpp:227. 

Memcpy nodes created for copying byval arguments are inserted before
CALLSEQ_START.

The two failing tests reported in PR10876 pass after applying this patch.  

llvm-svn: 140046
```
  79738336
- Specify an additional fixed bit in the Thumb2 SSAT encoding to prevent the... · 8c021d85
  Owen Anderson authored Sep 19, 2011
```
Specify an additional fixed bit in the Thumb2 SSAT encoding to prevent the decoder from emitting gibberish for this invalid encoding.

llvm-svn: 140041
```
  8c021d85