- Jul 11, 2002
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Anand Shukla authored
llvm-svn: 2875
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Anand Shukla authored
llvm-svn: 2874
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Chris Lattner authored
implemented so far. llvm-svn: 2871
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Chris Lattner authored
llvm-svn: 2870
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Chris Lattner authored
llvm-svn: 2869
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Chris Lattner authored
llvm-svn: 2868
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- Jul 10, 2002
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Vikram S. Adve authored
llvm-svn: 2861
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Vikram S. Adve authored
Represent previous bools and these ones with flags in a single byte per operand. llvm-svn: 2860
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Vikram S. Adve authored
llvm-svn: 2859
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Vikram S. Adve authored
and generate actual machine instruction sequences directly. llvm-svn: 2858
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Vikram S. Adve authored
llvm-svn: 2857
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Vikram S. Adve authored
and generate actual machine instruction sequences directly. Also a couple of bug fixes in code for putting constants into registers: -- Do *not* sign-extend unsigned constant that is shorter than int reg size -- Fix handling of address constant (a GlobalValue) vs. constant that must be loaded. llvm-svn: 2856
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Vikram S. Adve authored
-- FP argument to a function with no prototype going on stack was not being copied to the stack in colorCallArgs(). -- Put caller-saving code *before* argument copying code so that we don't trash a register before saving it! -- Two other minor fixes. llvm-svn: 2855
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Chris Lattner authored
llvm-svn: 2852
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- Jul 09, 2002
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Anand Shukla authored
llvm-svn: 2847
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Anand Shukla authored
llvm-svn: 2845
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Chris Lattner authored
llvm-svn: 2844
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Vikram S. Adve authored
assembly. llvm-svn: 2842
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Vikram S. Adve authored
llvm-svn: 2840
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Vikram S. Adve authored
changes in class MachineRegInfo (see MachineRegInfo.h for details). Added {LD,ST}[X]FSR instructions. llvm-svn: 2839
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Vikram S. Adve authored
llvm-svn: 2838
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Vikram S. Adve authored
llvm-svn: 2837
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Vikram S. Adve authored
basic block. Mark setCCInstr used as dest. of conditional-move as both a def and a use. BA instruction no longer has the unused CC argument. llvm-svn: 2836
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Vikram S. Adve authored
Added LDFSR, LDXFSR, STFSR and STXFSR. Fixed operands info for RDCCR, WRCCR. llvm-svn: 2835
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Vikram S. Adve authored
handle conditional move instructions: -- cpMem<->Reg functions now support CC registers (int and FP) correctly. Also, cpMem<->Reg functions now return a vector of machine instructions. -- Scratch registers must be explicitly provided to cpMem<->Reg when needed, since CC regs need one to be copied to/from memory. -- CC regs are saved to a scratch register instead of stack. -- All regs used by a instruction are now recorded in MachineInstr::regsUsed, since regs used to save values *across* an instruction are not obvious either from the operands or from the LiveVar sets. -- An (explicit or implicit) operand may now be both a def and a use. This is needed for conditional move operations. So an operand may need spill code both before and after the instruction. Other changes: -- Added several get{Class,Type} functions. -- Added unified-to-local register number conversion. -- class MachineCodeForBasicBlock is now an annotation on BasicBlock. -- Suggest/Color methods may modify the MachineInstr (and always did), so don't make that argument const! -- Caller-saving code doesn't need its special purpose code for handling CC registers since cpMem<->Reg handle those correctly now. llvm-svn: 2834
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Vikram S. Adve authored
handle conditional move instructions: -- cpMem<->Reg functions now support CC registers (int and FP) correctly. -- Scratch registers must be explicitly provided to cpMem<->Reg when needed, since CC regs need one to be copied to/from memory. -- CC regs are saved to a scratch register instead of stack. -- All regs used by a instruction are now recorded in MachineInstr::regsUsed, since regs used to save values *across* an instruction are not obvious either from the operands or from the LiveVar sets. -- An (explicit or implicit) operand may now be both a def and a use. This is needed for conditional move operations. So an operand may need spill code both before and after the instruction. -- class MachineCodeForBasicBlock is now an annotation on BasicBlock. llvm-svn: 2833
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Vikram S. Adve authored
because operands may be modified directly to set register. Also, class MachineCodeForBasicBlock is now an annotation on BasicBlock. llvm-svn: 2832
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Vikram S. Adve authored
llvm-svn: 2831
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Vikram S. Adve authored
llvm-svn: 2830
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Vikram S. Adve authored
This class is now an annotation on BasicBlock. llvm-svn: 2829
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Vikram S. Adve authored
llvm-svn: 2828
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Vikram S. Adve authored
Moved here from MachineInstr.cpp to make it an annotation on BasicBlock. llvm-svn: 2827
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Vikram S. Adve authored
so additional dep. edges have to be added. This was needed to correctly handle conditional move instructions! MachineCodeForBasicBlock is now an annotation on BasicBlock. Renamed "earliestForNode" to "earliestReadyTimeForNode". llvm-svn: 2826
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Vikram S. Adve authored
llvm-svn: 2825
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Vikram S. Adve authored
llvm-svn: 2822
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Vikram S. Adve authored
An (explicit or implicit) operand may now be both a def and a use. Also add a set of regs used by each instruction. dump() no longer takes an optional argument, which doesn't work in gdb. llvm-svn: 2821
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Vikram S. Adve authored
because operands may be modified directly to set register. llvm-svn: 2820
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Vikram S. Adve authored
llvm-svn: 2818
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- Jul 08, 2002
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Anand Shukla authored
llvm-svn: 2817
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Anand Shukla authored
llvm-svn: 2816
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