The stage is used to control where a live range is going, not where it
is coming from. Live ranges created by splitting will usually be marked
RS_New, but some are marked RS_Spill to avoid wasting time trying to
split them again.

The old RS_Global and RS_Local stages are merged - they are really the
same thing for local and global live ranges.

llvm-svn: 135911

llvm-svn: 135904

llvm-svn: 135886

This fixes PR10463. A two-address instruction with an <undef> use
operand was incorrectly rewritten so the def and use no longer used the
same register, violating the tie constraint.

Fix this by always rewriting <undef> operands with the register a def
operand would use.

llvm-svn: 135885

This method computes the edge bundles that should be live when splitting
around a compact region. This is independent of interference.

The function returns false if the live range was already a compact
region, or the compact region doesn't have any live bundles - it would
be the same as splitting around basic blocks.

Compact regions are computed using the normal spill placement code. We
pretend there is interference in all live-through blocks that don't use
the live range. This removes all edges from the Hopfield network used
for spill placement, so it converges instantly.

llvm-svn: 135847

If there is no interference and no last split point, we cannot
enterIntvBefore(Stop) - that function needs a real instruction.

Use enterIntvAtEnd instead for that very easy case.

This code doesn't currently run, it is needed by multi-way splitting.

llvm-svn: 135846

A split candidate can have a null PhysReg which means that it doesn't
map to a real interference pattern. Instead, pretend that all through
blocks have interference.

This makes it possible to generate compact regions where the live range
doesn't go through blocks that don't use it. The live range will still
be live between directly connected blocks with uses.

Splitting around a compact region tends to produce a live range with a
high spill weight, so it may evict a less dense live range.

llvm-svn: 135845

This method matches addLinks - All the listed blocks are considered to
have interference, so they add a negative bias to their bundles.

This could also be done by addConstraints, but that requires building a
separate BlockConstraint array.

llvm-svn: 135844

They always report 'no interference'.

llvm-svn: 135843

llvm-svn: 135833

ConstantExpr::getGetElementPtr to use ArrayRef.

llvm-svn: 135762

ArrayRef.

llvm-svn: 135761

llvm-svn: 135742

llvm-svn: 135738

llvm-svn: 135734

llvm-svn: 135724

llvm-svn: 135714

llvm-svn: 135633

There are two ways to map a variable to its lexical scope. Lexical scope information is embedded in MDNode describing the variable. It is also available as a part of DebugLoc attached with DBG_VALUE instruction. DebugLoc attached with an instruction is less reliable in optimized code so use information embedded in the MDNode.

llvm-svn: 135629

While emitting constant value, look through derived type and use underlying basic type to determine size and signness of the constant value.

llvm-svn: 135627

There is still a bit more refactoring left to do in Targets. But we are now very
close to fixing all the layering issues in MC.

llvm-svn: 135611

llvm-svn: 135595

- Introduce JITDefault code model. This tells targets to set different default
  code model for JIT. This eliminates the ugly hack in TargetMachine where
  code model is changed after construction.

llvm-svn: 135580

TargetLoweringObjectFileImpl down to MCObjectFileInfo.

TargetAsmInfo is done to one last method. It's *almost* gone!

llvm-svn: 135569

llvm-svn: 135535

llvm-svn: 135528

llvm-svn: 135478

(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.

llvm-svn: 135468

Revert r135423.

llvm-svn: 135454

llvm-svn: 135450

llvm-svn: 135448

library.

llvm-svn: 135443

better location welcome).

llvm-svn: 135438

errors like the one corrected by r135261.  Migrate all LLVM callers of the old
constructor to the new one.

llvm-svn: 135431

to MCRegisterInfo. Also initialize the mapping at construction time.

This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.

llvm-svn: 135424

During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases.
[take 2]

llvm-svn: 135423

When splitting a live range immediately before an LDR_POST instruction
that redefines the address register, make sure to use the correct value
number in leaveIntvBefore.

We need the value number entering the instruction.

<rdar://problem/9793765>

llvm-svn: 135413

Migrate LLVM and Clang to use the new makeArrayRef(...) functions where previously explicit non-default constructors were used.
Mostly mechanical with some manual reformatting.

llvm-svn: 135390

When trying to rematerialize a value before an instruction that has an
early-clobber redefine of the virtual register, make sure to look up the
correct value number.

Early-clobber defs are moved one slot back, so getBaseIndex is needed to
find the used value number.

Bugpoint was unable to reduce the test case for this, see PR10388.

llvm-svn: 135378

llvm-svn: 135375