Implements Instruction scheduler latencies for Silvermont,
using latencies from the Intel Silvermont Optimization Guide.

Auto detects SLM.

Turns on post RA scheduler when generating code for SLM.

llvm-svn: 190717

llvm-svn: 190659

Add basic assembly/disassembly support for the first Intel SHA
instruction 'sha1rnds4'. Also includes feature flag, and test cases.

Support for the remaining instructions will follow in a separate patch.

llvm-svn: 190611

The 'Deprecated' class allows you to specify a SubtargetFeature that the
instruction is deprecated on.

The 'ComplexDeprecationPredicate' class allows you to define a custom
predicate that is called to check for deprecation.
For example:
  ComplexDeprecationPredicate<"MCR">

would mean you would have to define the following function:
  bool getMCRDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,
                             std::string &Info)

Which returns 'false' for not deprecated, and 'true' for deprecated
and store the warning message in 'Info'.

The MCTargetAsmParser constructor was chaned to take an extra argument of
the MCInstrInfo class, so out-of-tree targets will need to be changed.

llvm-svn: 190598

Added parsing of mask register and "zeroing" semantic, like {%k1} {z}.

llvm-svn: 190595

llvm-svn: 190551

llvm-svn: 190547

llvm-svn: 190373

llvm-svn: 190366

We used to generate the compact unwind encoding from the machine
instructions. However, this had the problem that if the user used `-save-temps'
or compiled their hand-written `.s' file (with CFI directives), we wouldn't
generate the compact unwind encoding.

Move the algorithm that generates the compact unwind encoding into the
MCAsmBackend. This way we can generate the encoding whether the code is from a
`.ll' or `.s' file.

<rdar://problem/13623355>

llvm-svn: 190290

llvm-svn: 190259

llvm-svn: 190258

If the DAG already has only legal types, then the second round of DAG combines
is skipped. In this case VSELECT+SETCC patterns that match a more efficient
instruction (e.g. min/max) are never recognized.

This fix allows VSELECT+SETCC combines if the types are already legal before DAG
type legalization.

Reviewer: Nadav
llvm-svn: 190105

expression uses an assembler temporary symbol from an assignment.  In this case
the symbol does not have a fragment so the use of getFragment() would be NULL
and caused a crash. In the case of an assembler temporary symbol we want to use
the AliasedSymbol (if any) which will create a local relocation entry, but if
it is not an assembler temporary symbol then let it use that symbol with an
external relocation entry.

rdar://9356266

llvm-svn: 190096

Previously, the clang crash handling code would kick in and give a crash
report for these, even though they're not that sort of error.

rdar://14882264

llvm-svn: 189878

WIP: Refactor some code so that it can be called by more than just one method. No functionality change.

llvm-svn: 189849

llvm-svn: 189779

llvm-svn: 189742

llvm-svn: 189740

Specify GATHER/SCATTER as heavy instructions.

llvm-svn: 189736

llvm-svn: 189729

llvm-svn: 189728

llvm-svn: 189699

Fixed a bug where diassembling an instruction that had a prefix would cause LLVM to identify a 1-byte instruction, but then upon querying it for that 1-byte instruction would cause an undefined opcode.

llvm-svn: 189698

llvm-svn: 189673

Currently this is just the atom model with SSE4.2 enabled.

llvm-svn: 189669

llvm-svn: 189656

llvm-svn: 189654

Teach X86 backend to create BMI2 BZHI instructions from (and X, (add (shl 1, Y), -1)). Fixes PR17038.

llvm-svn: 189653

Clean up some usage of Triple.  The base class has methods for determining if the target is iOS and Linux.

llvm-svn: 189604

llvm-svn: 189580

32-bit absolute addressing in instructions likei this:

	mov $_f, %rsi

which is not supported in 64-bit mode.

rdar://8827134

llvm-svn: 189543

llvm-svn: 189472

in use supports it.

llvm-svn: 189439

For now, (defined(X86_64_JIT) && defined(__CYGWIN__)) satisfies Cygwin64.

llvm-svn: 189437

In the LLVM side, x86_64-cygwin is almost as same as x86_64-mingw32.

llvm-svn: 189436

Summary: MASM let's you do stuff like 'MOV FS:20, EAX' and 'MOV EAX, FS:20'

Reviewers: craig.topper, rnk

Reviewed By: rnk

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D1470

llvm-svn: 189407

llvm-svn: 189349

llvm-svn: 189326

Revert "Fix the build broken by r189315." and "Move everything depending on Object/MachOFormat.h over to Support/MachO.h."

This reverts commits r189319 and r189315. r189315 broke some tests on what I
believe are big-endian platforms.

llvm-svn: 189321