Re-apply 75490, 75806 and 76177 with fixes and tests.  Efficiency comes
next.

llvm-svn: 76486

llvm-svn: 76398

Revert 76177 for now. It's messing up ARM asm printing. Also this significant debate about its efficiency.

llvm-svn: 76279

Add logic to align instruction operands to columns for pretty-printing.
No target uses this currently.  This patch only adds the mechanism so
that local installations can choose to enable this.

llvm-svn: 76177

Get rid of postInstructionAction and call EmitComments directly.

llvm-svn: 75806

Add infrastructure to allow post instruction printing action triggers.
We'll eventually use this to print comments in asm files and do other
fun things.

This adds interfaces to the AsmPrinter and changes TableGen to invoke
the postInstructionAction when appropriate.  It also add parameters to
TargetAsmInfo to control comment layout.

llvm-svn: 75490

 - Sorry, I can't help myself.

 - No intended functionality change.

llvm-svn: 74742

llvm-svn: 73798

No functionality change.

llvm-svn: 71156

-Depend on DebugLocs for source line info.

(Comes with Regression-Be-Gone(tm))

llvm-svn: 70871

llvm-svn: 70811

-Depend on DebugLocs for source line info.

llvm-svn: 70803

-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable*
-Remove DwarfWriter::getOrCreateSourceID
-Make necessary changes for the above (fix callsites, etc.)

llvm-svn: 70520

which better identifies what the optimization is doing. And is more flexible for
future uses.

llvm-svn: 70440

Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.

llvm-svn: 70343

llvm-svn: 70275

use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...

llvm-svn: 70270

them, then the asmprinter emitter reescape them.

llvm-svn: 66958

them are generic changes.

- Use the "fast" flag that's already being passed into the asm printers instead
  of shoving it into the DwarfWriter.

- Instead of calling "MI->getParent()->getParent()" for every MI, set the
  machine function when calling "runOnMachineFunction" in the asm printers.

llvm-svn: 65379

  a DBG_LABEL or not. We want to fall back to the original way of emitting debug
  info when we're in -O0/-fast mode.
- Add plumbing in to pass the "Fast" flag to places that need it.
- XFAIL DebugInfo/deaddebuglabel.ll. This is finding 11 labels instead of 8. I
  need to investigate still.

llvm-svn: 65367

function. Emitting another label after the prologue messes up the debugging. We
are doing that because the first DebugLoc object it sees is different from the
previous, which was nothing. Check for this situation, and don't emit one if
it's the first.

llvm-svn: 65180

llvm-svn: 65092

locations may change, but the tuples may be the same.

llvm-svn: 65039

llvm-svn: 65034

everyone.

llvm-svn: 64978

llvm-svn: 64915

llvm-svn: 58263

Add a default constructor to AsmWriterOperand to make VS2008sp1 happy. (AsmWriterOperand is used in a std::pair, and VS need to generate the default constructor of this pair).

llvm-svn: 58185

the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.

Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.

This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.

llvm-svn: 52943

string began at a power of 2 in the string index.  For example, if "ret" started
at position 16, the ret instruction would be assigned code 16, but the mask would be AsmChars[] + Code & 15, not Code & 31.

llvm-svn: 49433

llvm-svn: 48450

Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.

llvm-svn: 48380

llvm-svn: 47367

llvm-svn: 46667

SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.

llvm-svn: 46659

llvm-svn: 45419

llvm-svn: 39993

llvm-svn: 33539

llvm-svn: 32333

not be used for anything other than backwards compat constraint handling.

Add support for a new DisableEncoding property which contains a list of
registers that should not be encoded by the generated code emitter.  Convert
the codeemitter generator to use this, fixing some PPC JIT regressions.

llvm-svn: 31769