This is a first step towards eliminating checks in Descriptor constructors.

llvm-svn: 97975

llvm-svn: 97963

This is a first step towards eliminating unncessary constructor checks in light weight DIDescriptor wrappers.

llvm-svn: 97947

Move MachineInstrExpressionTrait::getHashValue() out of line so it can skip over only virtual register defs. This matches what isEqual() is doing.

llvm-svn: 97680

llvm-svn: 97670

- Change MachineInstr::isIdenticalTo to take a new option that determines whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality.
- Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools).

llvm-svn: 97628

llvm-svn: 97578

Add non-temporal flags to MachineMemOperand.

llvm-svn: 96226

llvm-svn: 95781

the field from being used uninitialized later in some cases.

llvm-svn: 95735

into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687

instructions.

llvm-svn: 93925

llvm-svn: 93630

dumper doesn't really do what I want yet, but
at least it doesn't crash now.

llvm-svn: 93272

An instruction like this:

  %reg1097:1<def> = VMOVSR %R3<kill>, 14, %reg0

Must be replaced with this when substituting physical registers:

  %S0<def> = VMOVSR %R3<kill>, 14, %reg0, %D0<imp-def>

llvm-svn: 92812

Change errs() to dbgs().

llvm-svn: 92545

llvm-svn: 92214

llvm-svn: 92159

llvm-svn: 92158

llvm-svn: 91554

llvm-svn: 90815

the column number if it is not known. Handle the case of a missing filename
better.

llvm-svn: 90630

llvm-svn: 90488

llvm-svn: 90395

DICompileUnit. This code now prints debug filenames successfully.

llvm-svn: 90181

no filename. This situation is apparently fairly common right now.

llvm-svn: 89701

uninitialized memory.

llvm-svn: 88985

instructions. This makes CodeGen dumps significantly less noisy.

Example before:
  BL <ga:@bar>, %R0<imp-def>, %R1<imp-def,dead>, %R2<imp-def,dead>, %R3<imp-def,dead>, %R12<imp-def,dead>, %LR<imp-def,dead>, %D0<imp-def,dead>, %D1<imp-def,dead>, %D2<imp-def,dead>, %D3<imp-def,dead>, %D4<imp-def,dead>, %D5<imp-def,dead>, %D6<imp-def,dead>, %D7<imp-def,dead>, %D16<imp-def,dead>, %D17<imp-def,dead>, %D18<imp-def,dead>, %D19<imp-def,dead>, %D20<imp-def,dead>, %D21<imp-def,dead>, %D22<imp-def,dead>, %D23<imp-def,dead>, %D24<imp-def,dead>, %D25<imp-def,dead>, %D26<imp-def,dead>, %D27<imp-def,dead>, %D28<imp-def,dead>, %D29<imp-def,dead>, %D30<imp-def,dead>, %D31<imp-def,dead>, %CPSR<imp-def,dead>, %FPSCR<imp-def,dead>

Same example after:
  BL <ga:@bar>, %R0<imp-def>, %R1<imp-def,dead>, %LR<imp-def,dead>, %CPSR<imp-def,dead>, ...

llvm-svn: 86583

prints them with the leading '@'.

llvm-svn: 86261

 - Be consistent when referring to MachineBasicBlocks: BB#0.
 - Be consistent when referring to virtual registers: %reg1024.
 - Be consistent when referring to unknown physical registers: %physreg10.
 - Be consistent when referring to known physical registers: %RAX
 - Be consistent when referring to register 0: %reg0
 - Be consistent when printing alignments: align=16
 - Print jump table contents.
 - Don't print host addresses, in general.
 - and various other cleanups.

llvm-svn: 85682

llvm-svn: 85556

llvm-svn: 84749

llvm-svn: 84152

s/DebugLoc.InlinedLoc/DebugLoc.InlinedAtLoc/g

llvm-svn: 84054

is trivially rematerializable and integrate it into
TargetInstrInfo::isTriviallyReMaterializable. This way, all places that
need to know whether an instruction is rematerializable will get the
same answer.

This enables the useful parts of the aggressive-remat option by
default -- using AliasAnalysis to determine whether a memory location
is invariant, and removes the questionable parts -- rematting operations
with virtual register inputs that may not be live everywhere.

llvm-svn: 83687

TargetInstrDesc::isRematerializable flag, so it isn't necessary to do
this check in its callers.

llvm-svn: 83671

implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.

llvm-svn: 83475

the new predicates I added) instead of going through a context and doing a
pointer comparison.  Besides being cheaper, this allows a smart compiler
to turn the if sequence into a switch.

llvm-svn: 83297

llvm-svn: 83083

MathExtras.h in MachineMemOperand.h.

llvm-svn: 82822