Reserved registers are not candidates for scavenging, and they were removed
from the candidate list like this:

CreateRegClassMask(RC, Candidates);
Candidates ^= ReservedRegs;

However, when there are reserved registers outside RC, this causes invalid
bits to be set in Candidates.

llvm-svn: 75847

llvm-svn: 75840

llvm-svn: 75838

llvm-svn: 75831

we care more about random access than insertion/deletion of elements.

llvm-svn: 75828

llvm-svn: 75742

llvm-svn: 75703

Have asm printers use formatted_raw_ostream directly to avoid a
dynamic_cast<>.

llvm-svn: 75670

additional bug fixes:

1. The bug that everyone hit was a problem in the asmprinter where it
   would remove $stub but keep the L prefix on a name when emitting the
   indirect symbol.  This is easy to fix by keeping the name of the stub
   and the name of the symbol in a StringMap instead of just keeping a
   StringSet and trying to reconstruct it late.

2. There was a problem printing the personality function.  The current
   logic to print out the personality function from the DWARF information
   is a bit of a cesspool right now that duplicates a bunch of other 
   logic in the asm printer.  The short version of it is that it depends
   on emitting both the L and _ prefix for symbols (at least on darwin)
   and until I can untangle it, it is best to switch the mangler back to
   emitting both prefixes.

llvm-svn: 75646

This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").

llvm-svn: 75640

--- Reverse-merging r75619 into '.':
U    lib/Target/DarwinTargetAsmInfo.cpp
U    lib/CodeGen/AsmPrinter/AsmPrinter.cpp
--- Reverse-merging r75618 into '.':
U    lib/CodeGen/ELFWriter.cpp
U    lib/CodeGen/MachOCodeEmitter.cpp
U    lib/CodeGen/MachOWriter.cpp
--- Reverse-merging r75617 into '.':
U    lib/Target/CBackend/CBackend.cpp
--- Reverse-merging r75616 into '.':
U    tools/bugpoint/Miscompilation.cpp
U    tools/lto/LTOCodeGenerator.cpp
U    tools/lto/LTOModule.cpp

llvm-svn: 75638

llvm-svn: 75630

dubious looking things that I need to investigate in more detail.

llvm-svn: 75619

llvm-svn: 75618

indicates whether the label is private or not, instead of taking
prefix stuff.  One effect of this is that symbols will be generated
with *just* the private prefix, instead of both the private prefix
*and* the user-label-prefix, but this doesn't matter as long as it
is consistent.  For example we'll now get "Lfoo" instead of "L_foo".
These are just assembler temporary labels anyway, so they never even
make it into the .o file.

llvm-svn: 75607

llvm-svn: 75574

Fix pr4544. When remating, make sure the destination register fits the instruction definition. It may be mismatched due to sub-register coalescing. 
No test case yet because the code doesn't trigger until 75408 is re-applied.

llvm-svn: 75572

llvm-svn: 75553

llvm-svn: 75540

llvm-svn: 75537

and related functions out of LoopBase and into Loop, since they
are specific to BasicBlock-based loops. This also allows the code
to be moved out-of-line.

llvm-svn: 75523

using the Curiously Recurring Template Pattern with LoopBase.

This will help further refactoring, and future functionality for
Loop. Also, Headers can now foward-declare Loop, instead of pulling
in LoopInfo.h or doing tricks.

llvm-svn: 75519

llvm-svn: 75515

llvm-svn: 75508

llvm-svn: 75507

llvm-svn: 75503

Add infrastructure to allow post instruction printing action triggers.
We'll eventually use this to print comments in asm files and do other
fun things.

This adds interfaces to the AsmPrinter and changes TableGen to invoke
the postInstructionAction when appropriate.  It also add parameters to
TargetAsmInfo to control comment layout.

llvm-svn: 75490

llvm-svn: 75456

llvm-svn: 75454

llvm-svn: 75450

Begin the painful process of tearing apart the rat'ss nest that is Constants.cpp and ConstantFold.cpp.
This involves temporarily hard wiring some parts to use the global context.  This isn't ideal, but it's
the only way I could figure out to make this process vaguely incremental.

llvm-svn: 75445

llvm-svn: 75440

implemented in codegen, have no frontend to generate them, and are 
better implemented with pattern matching (like the ppc backend does
to generate rlwimi/rlwinm etc).

PR4543

llvm-svn: 75430

llvm-svn: 75423

The blackfin processor has a legal i16 type, but only logic operations on i32.

llvm-svn: 75419

llvm-svn: 75418

Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.

llvm-svn: 75379

and abort()/exit() -> llvm_report_error().

llvm-svn: 75363

Fix up support for OptionalDefOperand when it defaults to an actual register def. I need this to get ready for major Thumb1 surgery.

llvm-svn: 75328

llvm-svn: 75320