Rename MachineCacheInfo to TargetCacheInfo

llvm-svn: 5203

llvm-svn: 5200

llvm-svn: 5199

of the abstract frame representation

llvm-svn: 5198

* Use new FunctionFrameInfo object to manage stack slots instead of doing
  it directly
* Adjust to new MRegisterInfo API
* Don't take a TM as a ctor argument
* Don't keep track of which callee saved registers are modified
* Don't emit prolog/epilog code or spill/restore code for callee saved regs
* Use new allocation_order_begin/end iterators to simplify dramatically the
  logic for picking registers to allocate
* Machine PHI nodes can no longer contain constant arguments

* Use a bitvector to keep track of registers used instead of a set
* Fix problem where explicitly referenced registers would be added to
  regsused set and never removed

llvm-svn: 5196

* Use new FunctionFrameInfo object to manage stack slots instead of doing
  it directly
* Adjust to new MRegisterInfo API
* Don't take a TM as a ctor argument
* Don't keep track of which callee saved registers are modified
* Don't emit prolog/epilog code or spill/restore code for callee saved regs
* Use new allocation_order_begin/end iterators to simplify dramatically the
  logic for picking registers to allocate
* Machine PHI nodes can no longer contain constant arguments

llvm-svn: 5195

llvm-svn: 5194

  into a new MachineFunctionInfo class
* Implement new FunctionFrameInfo class

llvm-svn: 5193

llvm-svn: 5192

Only spill and reload caller saved registers that are actually modified.

llvm-svn: 5145

llvm-svn: 5144

llvm-svn: 5143

strtol to not miscompile, and fixing bug: 2002-12-23-LocalRAProblem.llx

llvm-svn: 5132

llvm-svn: 5113

* Add a new option to eliminate spilling of registers that are only used
  within a basic block.

llvm-svn: 5106

llvm-svn: 5103

llvm-svn: 5099

Move X86 specific alignment gunk to X86 files

llvm-svn: 5096

llvm-svn: 5093

* Implement register alias set support

llvm-svn: 5082

llvm-svn: 5081

llvm-svn: 5078

Remvoe some dead code

llvm-svn: 5070

llvm-svn: 5067

register allocation

llvm-svn: 5066

the dependence on PhysRegClassMap

llvm-svn: 5064

llvm-svn: 5061

llvm-svn: 5060

llvm-svn: 5058

llvm-svn: 5057

llvm-svn: 5055

spills and reloads emitted

llvm-svn: 5054

llvm-svn: 5053

llvm-svn: 5052

  function from normal regalloc code
* Make the regalloc for a block a function instead of part of runOnMachineBB, which
  makes it easier to see what's going on in runOnMBB.

llvm-svn: 5051

* Make allocateStackSpaceFor only allocate the right amount of space

llvm-svn: 5048

target register description classes.

llvm-svn: 5045

llvm-svn: 5044

llvm-svn: 5043

llvm-svn: 5035