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  7. Aug 16, 2011
    • Akira Hatanaka's avatar
      Fix handling of double precision loads and stores when Mips1 is targeted. · 2263c109
      Akira Hatanaka authored
      Mips1 does not support double precision loads or stores, therefore two single
      precision loads or stores must be used in place of these instructions. This 
      patch treats double precision loads and stores as if they are legal
      instructions until MCInstLowering, instead of generating the single precision
      instructions during instruction selection or Prolog/Epilog code insertion.
      
      Without the changes made in this patch, llc produces code that has the same 
      problem described in r137484 or bails out when
      MipsInstrInfo::storeRegToStackSlot or loadRegFromStackSlot is called before
      register allocation.
      
      llvm-svn: 137711
      2263c109
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  26. Jul 20, 2010
    • Bruno Cardoso Lopes's avatar
      Fix PR7174, a couple o Mips fixes: · 160695fe
      Bruno Cardoso Lopes authored
      - Fix a typo for PIC check during jmp table lowering
      - Also fix the "first jump table basic block is not
      considered only reachable by fall through" problem, use this
      ad-hoc solution until I come up with something better.
      
      Patch by stetorvs@gmail.com
      
      llvm-svn: 108820
      160695fe
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