llvm-svn: 14205

we do not want to fold the load in cases like this:

  X = load
    = add A, X
    = add B, X

llvm-svn: 14204

PR371

llvm-svn: 14203

Abort if we see a PCRelativeDisp MachineOperand, to be safe. This matches
the X86 backend.

llvm-svn: 14202

llvm-svn: 14201

Delete two functions that are now methods on the Type class

llvm-svn: 14200

llvm-svn: 14199

llvm-svn: 14196

The vector may actually be empty if the register that we are marking as
recently used is not actually allocatable.  This happens for physical registers
that are not allocatable, like the ST(x) registers on X86.

llvm-svn: 14195

llvm-svn: 14194

llvm-svn: 14192

llvm-svn: 14191

llvm-svn: 14189

llvm-svn: 14187

llvm-svn: 14186

llvm-svn: 14185

to visitBinaryOperator.

llvm-svn: 14182

This possibly fixes PR370

llvm-svn: 14181

llvm-svn: 14179

getReg() on void value.

llvm-svn: 14178

on a double-word boundary instead of a single-word boundary.

llvm-svn: 14177

non-register, non-immed. arguments to SETHI and OR using %hi() and
%lo() respectively.

llvm-svn: 14176

Support copying long constants to register pairs.
Support copying ConstantPointerNulls and ConstantPointerRefs to registers.

llvm-svn: 14175

llvm-svn: 14172

is write an autoconf macro that checks whether __isnan or isnan actually works
**using the C++ compiler after #include <cmath>**, instead of doing it the easy
way with AC_CHECK_FUNCS().

llvm-svn: 14171

peepholing, and make it work the same way in the JIT as in LLC.

llvm-svn: 14170

llvm-svn: 14168

function verification and make it a requirement that both arguments to
llvm.isunordered are of the same type.

llvm-svn: 14165

llvm-svn: 14159

instructions generated.

llvm-svn: 14154

printed incorrectly, and we were reserving 8 extra bytes of stack space for functions
on X86.

llvm-svn: 14152

llvm-svn: 14151

llvm-svn: 14150

comparisons.  In an 'isunordered' predicate, which looks like this at
the LLVM level:

        %a = call bool %llvm.isnan(double %X)
        %b = call bool %llvm.isnan(double %Y)
        %COM = or bool %a, %b

We used to generate this code:

        fxch %ST(1)
        fucomip %ST(0), %ST(0)
        setp %AL
        fucomip %ST(0), %ST(0)
        setp %AH
        or %AL, %AH

With this patch, we generate this code:

        fucomip %ST(0), %ST(1)
        fstp %ST(0)
        setp %AL

Which should make alkis happy.  Tested as X86/compare_folding.llx:test1

llvm-svn: 14148

llvm-svn: 14146

llvm-svn: 14145

we can get rid of the FpUCOM/FpUCOMi pseudo instructions, which makes stuff simpler
and faster.

llvm-svn: 14144

twoarg cases.

llvm-svn: 14143

testcase

llvm-svn: 14141

llvm-svn: 14140