llvm-svn: 119740

nodes to indicate when ha16/lo16 modifiers should be used.  This lets
us pass PowerPC/indirectbr.ll.

The one annoying thing about this patch is that the MCSymbolExpr isn't
expressive enough to represent ha16(label1-label2) which we need on
PowerPC.  I have a terrible hack in the meantime, but this will have
to be revisited at some point.

Last major conversion item left is global variable references.

llvm-svn: 119105

since it is trivial and will be shared between ppc and x86.
This substantially simplifies the X86 backend also.

llvm-svn: 119089

llvm-svn: 119088

llvm-svn: 119007

llvm-svn: 119006

llvm-svn: 118865

with a SimpleValueType, while an EVT supports equality and
inequality comparisons with SimpleValueType.

llvm-svn: 118169

calling convention out of the fast and normal ISel files, and
into the calling convention TD file.

llvm-svn: 117856

Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.

llvm-svn: 117667

llvm-svn: 117474

cannot use tailcall.  PR 8461.

llvm-svn: 117322

llvm-svn: 117020

llvm-svn: 116984

types are no longer Legal on X86, we don't need it.
No functional change.  8499854.

llvm-svn: 116947

llvm-svn: 116801

llvm-svn: 116800

that says what why what we just asserted is wrong.

llvm-svn: 116333

llvm-svn: 116323

llvm-svn: 116319

llvm-svn: 116214

llvm-svn: 116188

llvm-svn: 116177

llvm-svn: 116174

llvm-svn: 116173

llvm-svn: 116083

llvm-svn: 116063

Small patch to restore home register stack space allocation for the Win64 case.  Add test case.  This code eventually needs to be tighter, since it's always allocating it, even in leaf routines.

llvm-svn: 116056

Canonicalize X86ISD::MOVDDUP nodes to v2f64 to make sure all cases match. Also eliminate unneeded isel patterns. rdar://8520311

llvm-svn: 115977

Patch by Cameron!

llvm-svn: 115480

The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.

llvm-svn: 115243

llvm-svn: 114815

llvm-svn: 114811

llvm-svn: 114745

ARM cross-compiler on x86, because the MMO size did not match the type size.
This fixes the MMO size and also the size of the stack object to match the
type size.

llvm-svn: 114554

llvm-svn: 114529

llvm-svn: 114523

can access the stack due to how it is generated though.

llvm-svn: 114522

used with stack slots, but hey, lets be safe.

llvm-svn: 114521

llvm-svn: 114515