which denotes the register we would like to be assigned to (virtual or
physical). In register allocation, if this hint exists and we can map
it to a physical register (it is either a physical register or it is a
virtual register that already got assigned to a physical one) we use
that register if it is available instead of a random one in the free
pool.

llvm-svn: 10634

llvm-svn: 10632

llvm-svn: 10626

llvm-svn: 10623

llvm-svn: 10621

minor cleanups

llvm-svn: 10619

llvm-svn: 10604

with live intervals was missing registers that were used before they
were defined (in the arbitrary order live intervals numbers
instructions).

llvm-svn: 10603

allocation in the presence of preallocated intervals.

llvm-svn: 10595

llvm-svn: 10584

llvm-svn: 10570

nesting level when computing it. Right now the allocator uses:

    w = sum_over_defs_uses( 10 ^ nesting level );

llvm-svn: 10569

for live ranges that fall into assigned registers' holes.

llvm-svn: 10566

llvm-svn: 10560

* Move sparc specific code out of generic code
* Eliminate the getOffset() method which made INVALID_FRAME_OFFSET
  necessary, which made pulling in MAX_INT as a sentinal necessary.

llvm-svn: 10553

instead, since this pass doesn't expose any state to its users.

llvm-svn: 10520

Add a statistic for # reloads

llvm-svn: 10518

instruction pass. This also fixes all remaining bugs for this new
allocator to pass all tests under test/Programs.

llvm-svn: 10515

are not reserved registers.

llvm-svn: 10514

llvm-svn: 10513

more operands and the two first operands are constrained to be the
same. The pass takes an instruction of the form:

        a = b op c

and transforms it into:

        a = b
        a = a op c

and also preserves live variables.

llvm-svn: 10512

llvm-svn: 10511

killing instruction is tracked. This causes the LiveIntervals to
create bogus intervals. The workaound is to add a range to the
interval from the redefinition to the end of the basic block.

llvm-svn: 10510

Move some of the longer LiveIntervals::Interval method out of the
header and add debug information to them. Fix bug and simplify range
merging code.

llvm-svn: 10509

llvm-svn: 10469

    a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
    b) add isUse(), isDef()
    c) rename opHiBits32() to isHiBits32(),
              opLoBits32() to isLoBits32(),
              opHiBits64() to isHiBits64(),
              opLoBits64() to isLoBits64().

This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.

llvm-svn: 10461

register too.

llvm-svn: 10450

llvm-svn: 10449

llvm-svn: 10448

llvm-svn: 10447

llvm-svn: 10445

llvm-svn: 10444

regression tests.

llvm-svn: 10388

this point, the second operand must be a physical register (it cannot
be a virtual one).

llvm-svn: 10292

potential register assignment.

llvm-svn: 10291

llvm-svn: 10290

llvm-svn: 10289

llvm-svn: 10288

bug where spill instructions were added to the next basic block
instead of the end of the current one if the instruction that required
the spill was the last in the block.

llvm-svn: 10272

llvm-svn: 10268