Add a basic unit test for ImmutableMap. Found by inspection.

llvm-svn: 165907

llvm-svn: 165905

llvm-svn: 165904

Erasing from the beginning or middle of the vector is expensive, remove_if can
do it in linear time even though it's a bit ugly without lambdas.

No functionality change.

llvm-svn: 165903

llvm-svn: 165902

llvm-svn: 165900

llvm-svn: 165899

Can't follow the intrusive linked list when the element is gone.

llvm-svn: 165898

llvm-svn: 165897

Remove the bitwise AND operators from the Attributes class. Replace it with the equivalent from the builder class.

llvm-svn: 165896

Remove the bitwise assignment OR operator from the Attributes class. Replace it with the equivalent from the builder class.

llvm-svn: 165895

Remove the bitwise OR operator from the Attributes class. Replace it with the equivalent from the builder class.

llvm-svn: 165894

Remove the bitwise XOR operator from the Attributes class. Replace it with the equivalent from the builder class.

llvm-svn: 165893

Remove the bitwise NOT operator from the Attributes class. Replace it with the equivalent from the builder class.

llvm-svn: 165892

llvm-svn: 165891

llvm-svn: 165890

llvm-svn: 165889

llvm-svn: 165888

llvm-svn: 165887

Eli discovered that __noop's sema behavior also needs some love. I filed
PR14081 for that and intend to improve it.

llvm-svn: 165886

llvm-svn: 165885

Use traits_type::to_int_type in basic_streambuf<_CharT, _Traits>::xsputn when calling overflow to correctly handle negative signed character types.  This fixes http://llvm.org/bugs/show_bug.cgi?id=14074.

llvm-svn: 165884

Make the type_info for __shim_type_info visible.  This should address some failing dynamic_casts that a few applications are doing on the type_info hierarchy.

llvm-svn: 165883

Dimitry Andric:  FreeBSD only:  Add the C11 aligned_alloc to <cstdlib> and adjust the inclusion of quick_exit.

llvm-svn: 165882

llvm-svn: 165881

llvm-svn: 165880

llvm-svn: 165879

llvm-svn: 165878

The new coalescer can merge a dead def into an unused lane of an
otherwise live vector register.

Clear the <dead> flag when that happens since the flag refers to the
full virtual register which is still live after the partial dead def.

This fixes PR14079.

llvm-svn: 165877

llvm-svn: 165876

This patch migrates the strchr and strrchr optimizations from the
simplify-libcalls pass into the instcombine library call simplifier.

llvm-svn: 165875

This patch migrates the strcat and strncat optimizations from the
simplify-libcalls pass into the instcombine library call simplifier.

llvm-svn: 165874

This patch implements the new LibCallSimplifier class as outlined in [1].
In addition to providing the new base library simplification infrastructure,
all the fortified library call simplifications were moved over to the new
infrastructure.  The rest of the library simplification optimizations will
be moved over with follow up patches.

NOTE: The original fortified library call simplifier located in the
SimplifyFortifiedLibCalls class was not removed because it is still
used by CodeGenPrepare.  This class will eventually go away too.

[1] http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-August/052283.html

llvm-svn: 165873

It is possible that the live range of the value being pruned loops back
into the kill MBB where the search started. When that happens, make sure
that the beginning of KillMBB is also pruned.

Instead of starting a DFS at KillMBB and skipping the root of the
search, start a DFS at each KillMBB successor, and allow the search to
loop back to KillMBB.

This fixes PR14078.

llvm-svn: 165872

llvm-svn: 165871

type coercion code, especially when targetting ARM. Things like [1
x i32] instead of i32 are very common there.

The goal of this logic is to ensure that when we are picking an alloca
type, we look through such wrapper aggregates and across any zero-length
aggregate elements to find the simplest type possible to form a type
partition.

This logic should (generally speaking) rarely fire. It only ends up
kicking in when an alloca is accessed using two different types (for
instance, i32 and float), and the underlying alloca type has wrapper
aggregates around it. I noticed a significant amount of this occurring
looking at stepanov_abstraction generated code for arm, and suspect it
happens elsewhere as well.

Note that this doesn't yet address truly heinous IR productions such as
PR14059 is concerning. Those result in mismatched *sizes* of types in
addition to mismatched access and alloca types.

llvm-svn: 165870

help the dragonegg builders, and no test case at this point, but this
was one dimly plausible case I spotted by inspection. Hopefully will get
a testcase from those bots soon-ish, and will tidy this up with proper
testing.

llvm-svn: 165869

X86 doesn't have i8 cmovs so isel would emit a branch. Emitting branches at this
level is often not a good idea because it's too late for many optimizations to
kick in. This solution doesn't add any extensions (truncs are free) and tries
to avoid introducing partial register stalls by filtering direct copyfromregs.

I'm seeing a ~10% speedup on reading a random .png file with libpng15 via
graphicsmagick on x86_64/westmere, but YMMV depending on the microarchitecture.

llvm-svn: 165868

llvm-svn: 165867

This was only used by OSAtomicChecker and makes it more
difficult to update values for expressions that the environment
may look through instead (it's not the same as IgnoreParens).
With this gone, we can have bindExpr bind to the inner
expression that getSVal will find.

Groundwork for <rdar://problem/12137950>

llvm-svn: 165866