After the recent data-structure improvements, a couple of debugging statements
were broken (printing pointer values).

llvm-svn: 176791

llvm-svn: 176787

llvm-svn: 176783

Remove an unused member variable from HelpPrinter. Move another member variable to be a local variable in the only method that uses it.

llvm-svn: 176778

intrinsic - it can cause impossible-to-schedule subgraphs to be
introduced.

PR15053.

llvm-svn: 176777

This made us emit runtime checks in a random order. Hopefully bootstrap
miscompares will go away now.

llvm-svn: 176775

Ignore all DbgIntriniscInfo instructions instead of just DbgValueInst.

llvm-svn: 176769

We want vectorization to happen at -g. Ignore calls to the dbg.value intrinsic
and don't transfer them to the vectorized code.

radar://13378964

llvm-svn: 176768

The strlen+memcmp was hidden in a call to StringRef::operator==. We check if
there are any null bytes in the string upfront so we can simplify the comparison
Small speedup when compiling code with many function calls.

llvm-svn: 176766

llvm-svn: 176765

r176751. Also, learn a lesson about applying patches by hand/eyeball.

llvm-svn: 176764

llvm-svn: 176763

for choosing to emit a shndx was simply testing the wrong variable.

llvm-svn: 176762

Count the subprograms, not the compile units.

llvm-svn: 176751

it. Fortunately, versions of gcov that predate the extra checksum also ignore
any extra data, so this isn't a problem. There will be a matching commit in
compiler-rt.

llvm-svn: 176745

PHIs are allowed to have multiple operand pairs per predecessor, and
this code works just fine when it happens.

llvm-svn: 176734

Summary:
Statistics are still available in Release+Asserts (any +Asserts builds),
and stats can also be turned on with LLVM_ENABLE_STATS.

Move some of the FastISel stats that were moved under DEBUG()
back out of DEBUG(), since stats are disabled across the board now.

Many tests depend on grepping "-stats" output.  Move those into
a orig_dir/Stats/. so that they can be marked as unsupported
when building without statistics.

Differential Revision: http://llvm-reviews.chandlerc.com/D486

llvm-svn: 176733

llvm-svn: 176729

llvm-svn: 176722

The getOperandPtr utility already bounds checks, but allows one-off-the-end.
This assert should catch the cases that could previously have been dereferencing
these one-off-the-end pointer. Happily, no cases of this came up with this
change.

llvm-svn: 176721

llvm-svn: 176720

This pass hasn't been touched in two years & would fail with assertions against
the current debug info metadata format (the only test case for it still uses a
many-versions old debug info metadata format)

llvm-svn: 176707

To find the last use of a register unit, start from the bottom and scan
upwards until a user is found.

<rdar://problem/13353090>

llvm-svn: 176706

llvm-svn: 176703

Fixes PR15344.

llvm-svn: 176701

fold selectcc (selectcc x, y, a, b, cc), b, a, b, setne ->
     selectcc x, y, a, b, cc

Reviewed-by: Christian König <christian.koenig@amd.com>
llvm-svn: 176700

Two changes:
1. Prefer SET* instructions when possible
2. Handle the CND*_INT case with floating-point args

Reviewed-by: Christian König <christian.koenig@amd.com>
llvm-svn: 176699

Reviewed-by: Christian König <christian.koenig@amd.com>
llvm-svn: 176698

Reviewed-by: Christian König <christian.koenig@amd.com>
llvm-svn: 176697

Reviewed-by: Christian König <christian.koenig@amd.com>
llvm-svn: 176696

llvm-svn: 176695

LegalizeDAG.cpp uses the value of the comparison operands when checking
the legality of BR_CC, so DAGCombiner should do the same.

v2:
  - Expand more BR_CC value types for NVPTX

v3:
  - Expand correct BR_CC value types for Hexagon, Mips, and XCore.

llvm-svn: 176694

llvm-svn: 176689

Patch based on Mans Rullgard's.

llvm-svn: 176688

This is certainly not the last word on scheduling for this target, but
right now this allows a few apps to run / finish with radeonsi, most
notably UT2004 / Lightsmark. They fail to compile some shaders with the
default scheduler because it ends up trying to spill registers, which
we don't support yet (and which is probably a bad idea in general for
performance if it can be avoided).

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176687

This verifies live intervals both before and after scheduling. It's
useful for anyone hacking on live interval update.

Note that we don't yet pass verification all the time. We don't yet
handle updating nonallocatable live intervals perfectly.

llvm-svn: 176685

Code generation makes some basic assumptions about the IR it's been given. In
particular, if there is only one 'invoke' in the function, then that invoke
won't be going away. However, with the advent of the `llvm.donothing' intrinsic,
those invokes may go away. If all of them go away, the landing pad no longer has
any users. This confuses the back-end, which asserts.

This happens with SjLj exceptions, because that's the model that modifies the IR
based on there being invokes, etc. in the function.

Remove any invokes of `llvm.donothing' during SjLj EH preparation. This will
give us a CFG that the back-end won't be confused about. If all of the invokes
in a function are removed, then the SjLj EH prepare pass won't insert the bogus
code the relies upon the invokes being there.
<rdar://problem/13228754&13316637>

llvm-svn: 176677

llvm-svn: 176669

In very rare cases caused by irreducible control flow, the dominating
block can have the same trace head without actually being part of the
trace.

As long as such a dominator still has valid instruction depths, it is OK
to use it for computing instruction depths.

Rename the function to avoid lying, and add a check that instruction
depths are computed for the dominator.

llvm-svn: 176668

llvm-svn: 176661