- Sep 09, 2011
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Akira Hatanaka authored
llvm-svn: 139405
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Nadav Rotem authored
Implement vector-select support for avx256. Refactor the vblend implementation to have tablegen match the instruction by the node type llvm-svn: 139400
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Jim Grosbach authored
llvm-svn: 139399
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Duncan Sands authored
the instruction. llvm-svn: 139398
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Jim Grosbach authored
llvm-svn: 139389
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Akira Hatanaka authored
llvm-svn: 139383
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Jim Grosbach authored
llvm-svn: 139381
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Jakob Stoklund Olesen authored
In some cases such as interpreters using indirectbr, the CFG can be very complicated, and live range splitting may be forced to insert a large number of phi-defs. When that happens, traceSiblingValue can spend a lot of time zipping around in the CFG looking for defs and reloads. This patch causes more information to be cached in SibValues, and the cached values are used to terminate searches early. This speeds up spilling by 20x in one interpreter test case. For more typical code, this is just a 10% speedup of spilling. The previous version had bugs that caused miscompilations. They have been fixed. llvm-svn: 139378
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Andrew Trick authored
llvm-svn: 139375
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Craig Topper authored
Fix handling of Intel syntax disassembling of movs and stos to stop being blank. Also fixed scas, and cmps to always print size suffix in Intel syntax since its abiguous without arguments. Fixes PR10875. llvm-svn: 139353
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Akira Hatanaka authored
removing support for Mips1 and Mips2. This change and the ones that follow have been discussed with and approved by Bruno. llvm-svn: 139344
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Benjamin Kramer authored
llvm-svn: 139343
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Nick Lewycky authored
MachOObjectFile.cpp:524: error: unused variable 'NumLoadCommands' [-Wunused-variable] llvm-svn: 139341
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Akira Hatanaka authored
llvm-svn: 139339
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Devang Patel authored
Directly point debug info to the stack slot of the arugment, instead of trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges. llvm-svn: 139330
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Owen Anderson authored
llvm-svn: 139329
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Owen Anderson authored
llvm-svn: 139328
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Eric Christopher authored
llvm-svn: 139325
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Nadav Rotem authored
llvm-svn: 139324
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Jim Grosbach authored
Refactor operand handling for STRD as well. Tests for that forthcoming. llvm-svn: 139322
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- Sep 08, 2011
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Bruno Cardoso Lopes authored
triggered using llc with -O0, which wouldn't let it be folded and expose the lack of this pattern. llvm-svn: 139320
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Kevin Enderby authored
without a base symbol that must not have a relocation entry. llvm-svn: 139316
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Benjamin Kramer authored
Patch by Danil Malyshev! llvm-svn: 139314
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Bruno Cardoso Lopes authored
single field (Flags), which is a bitwise OR of items from the TB_* enum. This makes it easier to add new information in the future. * Gives every static array an equivalent layout: { RegOp, MemOp, Flags } * Adds a helper function, AddTableEntry, to avoid duplication of the insertion code. * Renames TB_NOT_REVERSABLE to TB_NO_REVERSE. * Adds TB_NO_FORWARD, which is analogous to TB_NO_REVERSE, except that it prevents addition of the Reg->Mem entry. (This is going to be used by Native Client, in the next CL). Patch by David Meyer llvm-svn: 139311
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Bruno Cardoso Lopes authored
in Nadav's r139285 and r139287 commits. 1) Rename vsel.ll to a more descriptive name 2) Change the order of BLEND operands to "Op1, Op2, Cond", this is necessary because PBLENDVB is already used in different places with this order, and it was being emitted in the wrong way for vselect 3) Add AVX patterns and tests for the same SSE41 instructions llvm-svn: 139305
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Bruno Cardoso Lopes authored
Triggered using llc -O0. Also fix some SET0PS patterns to their AVX forms and test it on the testcase. llvm-svn: 139304
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Nadav Rotem authored
llvm-svn: 139285
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Eli Friedman authored
llvm-svn: 139277
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Eli Friedman authored
Fix the logic in BasicAliasAnalysis::aliasGEP for comparing GEP's with variable differences so that it actually does something sane. Fixes PR10881. llvm-svn: 139276
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Jim Grosbach authored
More cleanup of the general indexed addressing T2 instructions. Still more to do, especially for stores. llvm-svn: 139272
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Jim Grosbach authored
Adjust encoding of writeback load/store instructions to better reflect the way the operand types are represented. llvm-svn: 139270
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Owen Anderson authored
Remove the "common" set of instructions shared between ARM and Thumb2 modes. This is no longer needed now that Thumb2 has its own copy of the STC/LDC instructions. llvm-svn: 139268
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Jim Grosbach authored
llvm-svn: 139267
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Jim Grosbach authored
llvm-svn: 139264
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Benjamin Kramer authored
llvm-svn: 139263
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- Sep 07, 2011
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Jakob Stoklund Olesen authored
It broke the self host and clang-x86_64-darwin10-RA. llvm-svn: 139259
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Jim Grosbach authored
llvm-svn: 139258
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Owen Anderson authored
llvm-svn: 139256
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Jim Grosbach authored
The immediate offset of the non-writeback i8 form (encoding T4) allows negative offsets only. The positive offset form of the encoding is the LDRT instruction. Immediate offsets in the range [0,255] use encoding T3 instead. llvm-svn: 139254
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Jim Grosbach authored
llvm-svn: 139251
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