llvm-svn: 114284

restrict dyn_cast_or_null to pointer types, just like cast_or_null; re-commit of r114279, backed out in r114280

llvm-svn: 114282

svn merge -c -114279 llvm/include/llvm/Support/Casting.h

llvm-svn: 114280

llvm-svn: 114279

llvm-svn: 114278

llvm-svn: 114277

remove CallSite::get; it is still present (as protected) in the baseclass, use one of the constructors intead

llvm-svn: 114275

llvm-svn: 114273

Added a separate class (PBQPBuilder) for PBQP Problem construction. This class can be extended to support custom constraints.

For now the allocator still uses the old (internal) construction mechanism by default. This will be phased out soon assuming 
no issues with the builder system come up.

To invoke the new construction mechanism just pass '-regalloc=pbqp -pbqp-builder' to llc. To provide custom constraints a
Target just needs to extend PBQPBuilder and pass an instance of their derived builder to the RegAllocPBQP constructor.

llvm-svn: 114272

llvm-svn: 114271

llvm-svn: 114270

NO path to the destination containing side effects, not that SOME path contains no side effects.
In  practice, this only manifests with CombinerAA enabled, because otherwise the chain has little
to no branching, so "any" is effectively equivalent to "all".

llvm-svn: 114268

llvm-svn: 114263

llvm-svn: 114262

llvm-svn: 114261

llvm-svn: 114260

thumb with floating point.

llvm-svn: 114256

llvm-svn: 114254

llvm-svn: 114248

instructions (PICADD, PICLDR, et.al.)

llvm-svn: 114243

with one in the generic printing code is an error.

llvm-svn: 114242

llvm-svn: 114241

llvm-svn: 114240

llvm-svn: 114237

value should be in GPRs when it's going to be used as a scalar, and we use
VMOVRRD to make that happen, but if the value is converted back to a vector
we need to fold to a simple bit_convert.  Radar 8407927.

llvm-svn: 114233

and shift instructions on ARM. Update the tests to match.

llvm-svn: 114230

llvm-svn: 114229

1) Do forward copy propagation. This makes it easier to estimate the cost of the
   instruction being sunk.
2) Break critical edges on demand, including cases where the value is used by
   PHI nodes.
Critical edge splitting is not yet enabled by default.

llvm-svn: 114227

llvm-svn: 114226

llvm-svn: 114222

legacy asm printer uses instructions of the form, "mov r0, r0, lsl #3", while
the MC-instruction printer uses the form "lsl r0, r0, #3". The latter mnemonic
is correct and preferred according the ARM documentation (A8.6.98). The former
are pseudo-instructions for the latter.

llvm-svn: 114221

llvm-svn: 114220

llvm-svn: 114219

llvm-svn: 114218

llvm-svn: 114215

llvm-svn: 114212

llvm-svn: 114211

llvm-svn: 114206

llvm-svn: 114205

llvm-svn: 114204