- May 29, 2013
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Tim Northover authored
This allows rematerialization during register coalescing to handle more cases involving operations like SUBREG_TO_REG which might need to be rematerialized using sub-register indices. For example, code like: v1(GPR64):sub_32 = MOVZ something v2(GPR64) = COPY v1(GPR64) should be convertable to: v2(GPR64):sub_32 = MOVZ something but previously we just gave up in places like this llvm-svn: 182872
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Adrian Prantl authored
llvm-svn: 182869
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Manman Ren authored
Since the testing case uses ref_addr, which requires version 3+ to work, we will solve the dwarf version issue first. This patch also causes failures in one of the bots. I will update the patch accordingly in my next attempt. rdar://13926659 llvm-svn: 182867
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JF Bastien authored
Tidy up three places where the register class for ARM and Thumb wasn't restrictive enough: - No PC dest for reg-reg add/orr/sub. - No PC dest for shifts. - No PC or SP for Thumb2 reg-imm add. I encountered this while combining FastISel with -verify-machineinstrs. These instructions defined registers whose classes weren't restrictive enough, and the uses failed verification. They're also undefined in the ISA, or would produce code that FastISel wouldn't want. This doesn't fix the register class narrowing issue (where uses should restrict definitions), and isn't thorough, but it's a small step in the right direction. llvm-svn: 182863
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NAKAMURA Takumi authored
llvm-svn: 182850
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Richard Sandiford authored
llvm-svn: 182847
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Richard Sandiford authored
This patch adds support for the CIJ and CGIJ instructions. llvm-svn: 182846
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Benjamin Kramer authored
llvm-svn: 182834
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Patrik Hagglund authored
llvm-svn: 182832
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Evgeniy Stepanov authored
Patch by Greg Fitzgerald. llvm-svn: 182831
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Venkatraman Govindaraju authored
llvm-svn: 182822
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NAKAMURA Takumi authored
llvm-svn: 182820
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NAKAMURA Takumi authored
llvm-svn: 182819
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David Blaikie authored
This updates the debug info metadata schema documentation for various schema changes made recently surrounding filename information for scopes and the representation of imported entities. llvm-svn: 182817
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David Blaikie authored
llvm-svn: 182816
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Jack Carter authored
This patch solves the problem of numeric register values not being accepted: ../set_alias.s:1:11: error: expected valid expression after comma .set r4,$4 ^ The parsing of .set directive is changed and handling of symbols in code as well to enable this feature. The test example is added. Patch by Vladimir Medic llvm-svn: 182807
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- May 28, 2013
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Tim Northover authored
llvm-svn: 182804
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Simon Atanasyan authored
llvm-svn: 182803
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Paul Redmond authored
- llvm.loop.parallel metadata has been renamed to llvm.loop to be more generic by making the root of additional loop metadata. - Loop::isAnnotatedParallel now looks for llvm.loop and associated llvm.mem.parallel_loop_access - document llvm.loop and update llvm.mem.parallel_loop_access - add support for llvm.vectorizer.width and llvm.vectorizer.unroll - document llvm.vectorizer.* metadata - add utility class LoopVectorizerHints for getting/setting loop metadata - use llvm.vectorizer.width=1 to indicate already vectorized instead of already_vectorized - update existing tests that used llvm.loop.parallel and llvm.vectorizer.already_vectorized Reviewed by: Nadav Rotem llvm-svn: 182802
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Michael Gottesman authored
[APInt] Implement tcDecrement as a counterpart to tcIncrement. This is for use in APFloat IEEE-754R 2008 nextUp/nextDown function. rdar://13852078 llvm-svn: 182801
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Tim Northover authored
Previously we would read-modify-write the target bits when processing relocations for the MCJIT. This had the problem that when relocations were processed multiple times for the same object file (as they can be), the result is not idempotent and the values became corrupted. The solution to this is to take any bits used in the destination from the pristine object file as LLVM emitted it. This should fix PR16013 and remote MCJIT on ARM ELF targets. llvm-svn: 182800
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Manman Ren authored
from a different CU. We used to print out an error message and fail to generate inlined_subroutine. If we use ref_addr in the generated DWARF, the DWARF version should be 3 or above. rdar://13926659 llvm-svn: 182791
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Jyotsna Verma authored
llvm-svn: 182790
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Chad Rosier authored
The size reduction in the RegDiffLists are rather dramatic. Here are a few size differences for MCTargetDesc.o files (before and after) in bytes: R600 - 36160B - 11184B - 69% reduction ARM - 28480B - 8368B - 71% reduction Mips - 816B - 576B - 29% reduction One side effect of dynamically computing the aliases is that the iterator does not guarantee that the entries are ordered or that duplicates have been removed. The documentation implies this is a safe assumption and I found no clients that requires these attributes (i.e., strict ordering and uniqueness). My local LNT tester results showed no execution-time failures or significant compile-time regressions (i.e., beyond what I would consider noise) for -O0g, -O2 and -O3 runs on x86_64 and i386 configurations. rdar://12906217 llvm-svn: 182783
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Benjamin Kramer authored
llvm-svn: 182779
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Benjamin Kramer authored
llvm-svn: 182778
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James Molloy authored
Extend LinkModules to pass a ValueMaterializer to RemapInstruction and friends to lazily create Functions for lazily linked globals. This is a big win when linking small modules with large (mostly unused) library modules. llvm-svn: 182776
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Evgeniy Stepanov authored
llvm-svn: 182771
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Renato Golin authored
llvm-svn: 182766
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Richard Sandiford authored
This patch adds support for the CRJ and CGRJ instructions. Support for the immediate forms will be a separate patch. The architecture has a large number of comparison instructions. I think it's generally better to concentrate on using the "best" comparison instruction first and foremost, then only use something like CRJ if CR really was the natual choice of comparison instruction. The patch therefore opportunistically converts separate CR and BRC instructions into a single CRJ while emitting instructions in ISelLowering. llvm-svn: 182764
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Renato Golin authored
llvm-svn: 182763
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Richard Sandiford authored
This is needed for the upcoming compare-and-branch patch. No functional change intended. llvm-svn: 182762
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Alexey Samsonov authored
llvm-svn: 182761
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Renato Golin authored
llvm-svn: 182759
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Alexey Samsonov authored
llvm-svn: 182758
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Michael Kuperstein authored
Make BasicAliasAnalysis recognize the fact a noalias argument cannot alias another argument, even if the other argument is not itself marked noalias. llvm-svn: 182755
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Rafael Espindola authored
No functionality change. llvm-svn: 182747
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Rafael Espindola authored
And remove header and cpp file that are empty after that. llvm-svn: 182746
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- May 27, 2013
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Preston Gurd authored
When -ffast-math is in effect (on Linux, at least), clang defines __FINITE_MATH_ONLY__ > 0 when including <math.h>. This causes the preprocessor to include <bits/math-finite.h>, which renames the sqrt functions. For instance, "sqrt" is renamed as "__sqrt_finite". This patch adds the 3 new names in such a way that they will be treated as equivalent to their respective original names. llvm-svn: 182739
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Rafael Espindola authored
llvm-svn: 182734
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