- Sep 06, 2012
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Roman Divacky authored
llvm-svn: 163324
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Tim Northover authored
Patch by Chris Lidbury. llvm-svn: 163323
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Dmitry Vyukov authored
tsan: increase max shadow stack size + reduce memory consumption at the same time (by not memorizing full stacks in traces) llvm-svn: 163322
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Tim Northover authored
Patch by Chris Lidbury. llvm-svn: 163321
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Dmitry Vyukov authored
llvm-svn: 163320
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Arnold Schwaighofer authored
Enhances basic alias analysis to recognize phis whose first incoming values are NoAlias and whose other incoming values are just the phi node itself through some amount of recursion. Example: With this change basicaa reports that ptr_phi and ptr_phi2 do not alias each other. bb: ptr = ptr2 + 1 loop: ptr_phi = phi [bb, ptr], [loop, ptr_plus_one] ptr2_phi = phi [bb, ptr2], [loop, ptr2_plus_one] ... ptr_plus_one = gep ptr_phi, 1 ptr2_plus_one = gep ptr2_phi, 1 This enables the elimination of one load in code like the following: extern int foo; int test_noalias(int *ptr, int num, int* coeff) { int *ptr2 = ptr; int result = (*ptr++) * (*coeff--); while (num--) { *ptr2++ = *ptr; result += (*coeff--) * (*ptr++); } *ptr = foo; return result; } Part 2/2 of fix for PR13564. llvm-svn: 163319
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Tim Northover authored
Patch by Chris Lidbury. llvm-svn: 163318
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Arnold Schwaighofer authored
If we can show that the base pointers of two GEPs don't alias each other using precise analysis and the indices and base offset are equal then the two GEPs also don't alias each other. This is primarily needed for the follow up patch that analyses NoAlias'ing PHI nodes. Part 1/2 of fix for PR13564. llvm-svn: 163317
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Nadav Rotem authored
llvm-svn: 163316
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Tom Stellard authored
This Operand type takes a default argument, and is initialized to this value if it does not appear in a patter. llvm-svn: 163315
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Alexander Potapenko authored
Fix two compiler warnings: must use at least one argument for "..." in a variadic macros, signed vs. unsigned comparison. llvm-svn: 163314
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Evgeniy Stepanov authored
llvm-svn: 163313
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Elena Demikhovsky authored
Added generation of VPSHUB instruction for <32 x i8> vector shuffle when possible. llvm-svn: 163312
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Alexander Potapenko authored
llvm-svn: 163311
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Nadav Rotem authored
llvm-svn: 163309
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Kostya Serebryany authored
llvm-svn: 163308
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Nadav Rotem authored
llvm-svn: 163307
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James Molloy authored
llvm-svn: 163306
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Hans Wennborg authored
The lookup tables did not get built in a deterministic order. This makes them get built in the order that the corresponding phi nodes were found. llvm-svn: 163305
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James Molloy authored
If we have a BUILD_VECTOR that is mostly a constant splat, it is often better to splat that constant then insertelement the non-constant lanes instead of insertelementing every lane from an undef base. llvm-svn: 163304
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Alexey Samsonov authored
llvm-svn: 163303
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Hans Wennborg authored
This adds a transformation to SimplifyCFG that attemps to turn switch instructions into loads from lookup tables. It works on switches that are only used to initialize one or more phi nodes in a common successor basic block, for example: int f(int x) { switch (x) { case 0: return 5; case 1: return 4; case 2: return -2; case 5: return 7; case 6: return 9; default: return 42; } This speeds up the code by removing the hard-to-predict jump, and reduces code size by removing the code for the jump targets. llvm-svn: 163302
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Alexander Potapenko authored
This should fix http://code.google.com/p/address-sanitizer/issues/detail?id=105 llvm-svn: 163301
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Alexey Samsonov authored
llvm-svn: 163300
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Nadav Rotem authored
Add a new optimization pass: Stack Coloring, that merges disjoint static allocations (allocas). Allocas are known to be disjoint if they are marked by disjoint lifetime markers (@llvm.lifetime.XXX intrinsics). llvm-svn: 163299
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James Molloy authored
Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to a VSETLN on D registers, instead of an (INSERT_SUBREG (VSETLN (EXTRACT_SUBREG ))) sequence to help the register coalescer. llvm-svn: 163298
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Alexey Samsonov authored
llvm-svn: 163297
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Alexey Samsonov authored
llvm-svn: 163296
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Michael Liao authored
llvm-svn: 163295
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Alexey Samsonov authored
llvm-svn: 163294
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Craig Topper authored
Use iPTR instead of i32 for extract_subvector/insert_subvector index in lowering and patterns. This makes it consistent with the incoming DAG nodes from the DAG builder. llvm-svn: 163293
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Craig Topper authored
Add patterns for converting stores of subvector_extracts of lower 128-bits of a 256-bit vector to VMOVAPSmr/VMOVUPSmr. llvm-svn: 163292
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Kostya Serebryany authored
llvm-svn: 163291
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Jim Grosbach authored
This reverts commit 163278. Works OK on x86_64, but not i386. Will re-enable when that's cleared up. llvm-svn: 163290
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NAKAMURA Takumi authored
llvm-svn: 163289
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NAKAMURA Takumi authored
llvm-svn: 163288
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Jack Carter authored
assembler such as shifts greater than 32. In the case of direct object, the code gen needs to do this lowering since the assembler is not involved. With the advent of the llvm-mc assembler, it also needs to do the same lowering. This patch makes that specific lowering code accessible to both the direct object output and the assembler. This patch does not affect generated output. llvm-svn: 163287
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Jordan Rose authored
Caught by Kurt Arnlund! llvm-svn: 163286
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Jason Molenda authored
only accept the first matching type based on lldb's sizeofs. <rdar://problem/12222109> llvm-svn: 163285
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Sean Callanan authored
which can conflict with accurate crash reporting in multithreaded contexts. llvm-svn: 163282
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