llvm-svn: 41962

ambiguity.

llvm-svn: 41960

llvm-svn: 41959

isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958

for consistency with many other transforms.

llvm-svn: 41957

are strict about such things.

llvm-svn: 41956

llvm-svn: 41953

miscompilation of 188.ammp.  Reject select and bitcast in 
ValueIsOnlyUsedLocallyOrStoredToOneGlobal because RewriteHeapSROALoadUser can't handle it.

llvm-svn: 41950

llvm-svn: 41949

llvm-svn: 41947

llvm-svn: 41941

(http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070910/053370.html). It's
causing SPASS to fail.

llvm-svn: 41938

a limited form of PHI nodes.  This finally fixes PR1639, speeding 179.art up
from 7.84s to 3.13s on PPC.

llvm-svn: 41933

along the way of PR1639

llvm-svn: 41930

llvm-svn: 41929

bitcasts and phis.  This is a step to fixing PR1639.

llvm-svn: 41928

nodes.  This is the first step of the fix for PR1639.

llvm-svn: 41927

llvm-svn: 41925

llvm-svn: 41924

llvm-svn: 41923

llvm-svn: 41901

llvm-svn: 41900

llvm-svn: 41899

llvm-svn: 41898

1.
[(set GR32:$dst, (add GR32:$src1, GR32:$src2)),
 (modify EFLAGS)]
This indicates the source pattern expects the instruction would produce 2 values. The first is the result of the addition. The second is an implicit definition in register EFLAGS.
2.
def : Pat<(parallel (addc GR32:$src1, GR32:$src2), (modify EFLAGS)), ()>
Similar to #1 except this is used for def : Pat patterns.

llvm-svn: 41897

llvm-svn: 41893

llvm-svn: 41881

using it for live-in values etc.

llvm-svn: 41879

llvm-svn: 41876

Next round of x87 long double stuff.
Getting close now, basically works.

llvm-svn: 41875

(could break hash table in ConstantFP)

llvm-svn: 41874

llvm-svn: 41873

llvm-svn: 41872

same time. Do not mark the "smaller" def as dead.

llvm-svn: 41871

llvm-svn: 41870

llvm-svn: 41869

llvm-svn: 41863

llvm-svn: 41862

llvm-svn: 41861

llvm-svn: 41859