the coalescer.  This doesn't really work, but gets us farther than
before.

llvm-svn: 48446

llvm-svn: 48445

other targets.  Use autogenerated calling conv to lower result of
calls.

llvm-svn: 48444

return lowering first.  This fixes a bug where the top and bottom
of i64 values were returned in the wrong registers before.

llvm-svn: 48443

best practices.

llvm-svn: 48442

each lowering, which is 'best practice'.

llvm-svn: 48441

behavior where a callee thinks a param will be
present in memory, even though the ABI doc says
it doesn't have to be.  Handle complex long long
and complex double (4 and 8 return regs).

llvm-svn: 48439

llvm-svn: 48438

llvm-svn: 48430

llvm-svn: 48422

llvm-svn: 48421

Patch originally by Erick Tryzelaar, but has been modified somewhat.

llvm-svn: 48419

llvm-svn: 48413

Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.

llvm-svn: 48412

llvm-svn: 48381

Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.

llvm-svn: 48380

Patch by Erick Tryzelaar.

llvm-svn: 48379

table for nounwind calls.

llvm-svn: 48373

Fix PR2138. Apparently any modification to a std::multimap (including remove entries for a different key) can invalidate multimap iterators.

llvm-svn: 48371

llvm-svn: 48370

llvm-svn: 48369

vectors go at the end of the memory area, after all
non-vector parameters.

llvm-svn: 48364

llvm-svn: 48361

Fix a number of encoding bugs. SSE 4.1 instructions MPSADBWrri, PINSRDrr, etc. have 8-bits immediate field (ImmT == Imm8).

llvm-svn: 48360

llvm-svn: 48359

llvm-svn: 48356

llvm-svn: 48355

the type instead of the byte size. This was causing troublesome mis-compilations.

True to form, this took 2 days to find and is a one-line fix. :-P

llvm-svn: 48354

Use getIntPtrConstant in a couple places to shorten stuff up
Handle splitting vector shuffles with undefs in the mask

llvm-svn: 48351

Livein copy scheduling fixes: do not coalesce physical register copies, correctly determine the safe location to insert the copies.

llvm-svn: 48348

llvm-svn: 48346

llvm-svn: 48344

pointer bitcast when performing return slot optimization.

llvm-svn: 48343

llvm-svn: 48341

Thanks Daniel Dunbar!

llvm-svn: 48340

llvm-svn: 48337

Don't try to sink 3-address instruction if convertToThreeAddress created more than one instructions.

llvm-svn: 48336

llvm-svn: 48334

TwoAddressInstructionPass enhancement. After it converts a two address instruction into a 3-address one, sink it past the instruction that kills the read-mod-write register if its definition is used past the kill. This reduces the number of live register by one.

llvm-svn: 48333

Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. 

Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
llvm-svn: 48329