interfered with other registers.  Seems like that might be a good thing to do. :-)

llvm-svn: 44902

llvm-svn: 44899

Bug fix. Only safe to perform extension uses optimization if the source of extension is also defined in the same BB as the extension.

llvm-svn: 44896

Changes from me implementing different way of representing points-to anything.
Changes from me that improve slightly on LCD.

llvm-svn: 44895

If deleting a reload instruction due to reuse (value is available in register R and reload is targeting R), make sure to invalidate the kill information of the last kill.

llvm-svn: 44894

llvm-svn: 44892

llvm-svn: 44881

llvm-svn: 44877

llvm-svn: 44874

- Fix subtle bug when creating initially creating this map.

llvm-svn: 44873

because those with side effects will be caught by other checks in here.

Also, simplify the check for a BB in a sub loop.

llvm-svn: 44871

llvm-svn: 44869

llvm-svn: 44864

llvm-svn: 44859

regions of memory that have a target specific relationship, as described in the 
Embedded C Technical Report. 

This also implements the 2007-12-11-AddressSpaces test, 
which demonstrates how address space attributes can be used in LLVM IR.

In addition, this patch changes the bitcode signature for stores (in a backwards 
compatible manner), such that the pointer type, rather than the pointee type, is 
encoded. This permits type information in the pointer (e.g. address space) to be 
preserved for stores.

LangRef updates are forthcoming.

llvm-svn: 44858

This allows us to compile:

#include <emmintrin.h>
typedef __m128i VSInt16;
typedef short vSInt16 __attribute__ ((__vector_size__ (16)));
VSInt16 t3() {
  return (VSInt16)((vSInt16)_mm_set1_epi16(6518));
}

into:

_t3:
	movaps	LCPI1_0, %xmm0
	ret

instead of:
_t3:
	movl	$6518, %eax
	movd	%eax, %xmm0
	pextrw	$0, %xmm0, %eax
	xorps	%xmm0, %xmm0
	pinsrw	$0, %eax, %xmm0
	punpcklwd	%xmm0, %xmm0
	pshufd	$0, %xmm0, %xmm0
	ret

llvm-svn: 44856

of source/dest elements changes.  This implements
test/Transforms/InstCombine/bitcast-vector-fold.ll

llvm-svn: 44855

Support libraries separately into their own module.

llvm-svn: 44852

llvm-svn: 44850

llvm-svn: 44849

llvm-svn: 44838

llvm-svn: 44837

possible before resorting to pextrw and pinsrw.
- Better codegen for v4i32 shuffles masquerading as v8i16 or v16i8 shuffles.
- Improves (i16 extract_vector_element 0) codegen by recognizing
  (i32 extract_vector_element 0) does not require a pextrw.

llvm-svn: 44836

llvm-svn: 44835

per-function collector model. Collector is now the factory for
CollectorMetadata, so the latter may be subclassed.

llvm-svn: 44827

don't have to #include config.h in it.  #including config.h breaks
other projects that have their own autoconf stuff and try to #include
the llvm headers.  One obscure example is llvm-gcc.

llvm-svn: 44825

Thompson. Usage should be something like this:

open Llvm
open Llvm_bitreader

match read_bitcode_file fn with
  | Bitreader_failure msg ->
      prerr_endline msg
  | Bitreader_success m -> 
      ...;
      dispose_module m

Compile with: ocamlc llvm.cma llvm_bitreader.cma
              ocamlopt llvm.cmxa llvm_bitreader.cmxa

llvm-svn: 44824

llvm-svn: 44820

llvm-svn: 44819

Use it for Darwin.

llvm-svn: 44818

Reimplement the xform in Analysis/ConstantFolding.cpp where we can use
targetdata to validate that it is safe.  While I'm in there, fix some const
correctness issues and generalize the interface to the "operand folder".

llvm-svn: 44817

These should probably be something like:

  CFI(".cfi_def_cfa_offset 16\n")

where CFI is defined to a noop on darwin and other platforms
that don't support those directives.

llvm-svn: 44803

on functions as it calculates them.

llvm-svn: 44802

using the minimum possible number of bytes.  For little
endian targets run on little endian machines, apints are
stored in memory from LSB to MSB as before.  For big endian
targets on big endian machines they are stored from MSB to
LSB which wasn't always the case before (if the target and
host endianness doesn't match values are stored according
to the host's endianness).  Doing this requires knowing the
endianness of the host, which is determined when configuring -
thanks go to Anton for this.  Only having access to little
endian machines I was unable to properly test the big endian
part, which is also the most complicated...

llvm-svn: 44796

All bad stuff from SSE version is implicitely inherited :)

llvm-svn: 44794

broken, because doesn't mark xmm regs properly

llvm-svn: 44793

This will allow us (theoretically) to unwind through JITer.
The code wasn't verified, so I'm pretty sure offsets are wrong :)

llvm-svn: 44792

get it to compile.

llvm-svn: 44791

how the CodeGen machinery works.

llvm-svn: 44786

Improve branch folding by recgonizing that explict successor relationships impact the value of fall-through choices.

llvm-svn: 44785