(C1-X) == C2 --> X == C1-C2
(X+C1) == C2 --> X == C2-C1

This allows us to compile this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

into this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

not this:

_X:
        movl $14, %eax
        addl 4(%esp), %eax
        cmpl $12345, %eax
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

Testcase here: Regression/CodeGen/X86/compare-add.ll

nukage of the and coming up next.

llvm-svn: 25898

llvm-svn: 25897

llvm-svn: 25896

llvm-svn: 25895

llvm-svn: 25894

%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4)

and get:

xyz r2, r3, r4, r2

note that the r2's are pinned together.  Yaay for 2-address instructions.

2342 ----------------------------------------------------------------------

llvm-svn: 25893

llvm-svn: 25892

llvm-svn: 25891

llvm-svn: 25890

llvm-svn: 25889

llvm-svn: 25888

llvm-svn: 25887

substituted operands.  For this testcase:

int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

we now emit:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz r2, r2, r3  ;; look here
        or r3, r2, r2
        blr

... note the substituted operands. :)

llvm-svn: 25886

llvm-svn: 25885

llvm-svn: 25884

llvm-svn: 25883

llvm-svn: 25882

llvm-svn: 25881

llvm-svn: 25880

llvm-svn: 25879

int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

into:

 (0x8906130, LLVM BB @0x8902220):
        %r2 = OR4 %r3, %r3
        %r3 = OR4 %r4, %r4
        INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3
        %r3 = OR4 %r2, %r2
        BLR

which asmprints as:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz $0, $1, $2      ;; need to print the operands now :)
        or r3, r2, r2
        blr

llvm-svn: 25878

llvm-svn: 25877

llvm-svn: 25876

of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875

llvm-svn: 25873

- Added a new format for instructions where the source register is implied
  and it is same as the destination register. Used for pseudo instructions
  that clear the destination register.

llvm-svn: 25872

llvm-svn: 25871

llvm-svn: 25870

llvm-svn: 25869

llvm-svn: 25868

llvm-svn: 25867

Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use.

llvm-svn: 25866

llvm-svn: 25865

general, useful, and easier to use.

llvm-svn: 25864

value or the chain going into the load.

llvm-svn: 25863

llvm-svn: 25862

ensure the memory location has not been clobbered.

llvm-svn: 25861

llvm-svn: 25860

it is already available in memory, do a fld directly from there.

llvm-svn: 25859

llvm-svn: 25858