- Nov 06, 2008
-
-
Evan Cheng authored
llvm-svn: 58818
-
Dan Gohman authored
llvm-svn: 58816
-
Bill Wendling authored
llvm-svn: 58815
-
Devang Patel authored
llvm-svn: 58814
-
Evan Cheng authored
- Consolidate instruction formats. - Other clean up. llvm-svn: 58808
-
Evan Cheng authored
llvm-svn: 58807
-
Nuno Lopes authored
llvm-svn: 58805
-
Duncan Sands authored
llvm-svn: 58801
-
Evan Cheng authored
llvm-svn: 58800
-
Bill Wendling authored
- Get rid of "HasStackProtector" in MachineFrameInfo. - Modify intrinsics to tell which are doing what with memory. llvm-svn: 58799
-
Mon P Wang authored
llvm-svn: 58796
-
Evan Cheng authored
llvm-svn: 58793
-
Bill Wendling authored
"alloca". llvm-svn: 58792
-
Bill Wendling authored
- stackprotector_prologue creates a stack object and stores the guard there. - stackprotector_epilogue reads the stack guard from the stack position created by stackprotector_prologue. - The PrologEpilogInserter was changed to make sure that the stack guard is first on the stack frame. llvm-svn: 58791
-
Evan Cheng authored
llvm-svn: 58790
-
Evan Cheng authored
llvm-svn: 58789
-
Evan Cheng authored
llvm-svn: 58788
-
Devang Patel authored
llvm-svn: 58787
-
Devang Patel authored
llvm-svn: 58786
-
Evan Cheng authored
llvm-svn: 58782
-
Bill Wendling authored
llvm-svn: 58781
-
Evan Cheng authored
llvm-svn: 58780
-
Evan Cheng authored
llvm-svn: 58778
-
- Nov 05, 2008
-
-
Evan Cheng authored
Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions. llvm-svn: 58764
-
Dan Gohman authored
changes. llvm-svn: 58760
-
Richard Osborne authored
llvm-svn: 58755
-
Duncan Sands authored
llvm-svn: 58753
-
Evan Cheng authored
llvm-svn: 58752
-
Evan Cheng authored
llvm-svn: 58751
-
Evan Cheng authored
llvm-svn: 58750
-
Dan Gohman authored
priority function. Instead, just iterate over the AllNodes list, which is already in topological order. This eliminates a fair amount of bookkeeping, and speeds up the isel phase by about 15% on many testcases. The impact on most targets is that AddToISelQueue calls can be simply removed. In the x86 target, there are two additional notable changes. The rule-bending AND+SHIFT optimization in MatchAddress that creates new pre-isel nodes during isel is now a little more verbose, but more robust. Instead of either creating an invalid DAG or creating an invalid topological sort, as it has historically done, it can now just insert the new nodes into the node list at a position where they will be consistent with the topological ordering. Also, the address-matching code has logic that checked to see if a node was "already selected". However, when a node is selected, it has all its uses taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any further visits from MatchAddress. This code is now removed. llvm-svn: 58748
-
Dan Gohman authored
by isel and potentially forced into registers. llvm-svn: 58747
-
Evan Cheng authored
indirect gv reference. Please don't call it lazy. llvm-svn: 58746
-
Devang Patel authored
llvm-svn: 58744
-
Devang Patel authored
llvm-svn: 58743
-
Devang Patel authored
llvm-svn: 58742
-
Bill Wendling authored
llvm-svn: 58741
-
Bill Wendling authored
llvm-svn: 58740
-
Bill Wendling authored
llvm-svn: 58739
-
Owen Anderson authored
llvm-svn: 58738
-