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  23. Jul 07, 2012
    • Andrew Trick's avatar
      I'm introducing a new machine model to simultaneously allow simple · 87255e34
      Andrew Trick authored
      subtarget CPU descriptions and support new features of
      MachineScheduler.
      
      MachineModel has three categories of data:
      1) Basic properties for coarse grained instruction cost model.
      2) Scheduler Read/Write resources for simple per-opcode and operand cost model (TBD).
      3) Instruction itineraties for detailed per-cycle reservation tables.
      
      These will all live side-by-side. Any subtarget can use any
      combination of them. Instruction itineraries will not change in the
      near term. In the long run, I expect them to only be relevant for
      in-order VLIW machines that have complex contraints and require a
      precise scheduling/bundling model. Once itineraries are only actively
      used by VLIW-ish targets, they could be replaced by something more
      appropriate for those targets.
      
      This tablegen backend rewrite sets things up for introducing
      MachineModel type #2: per opcode/operand cost model.
      
      llvm-svn: 159891
      87255e34
    • Andrew Trick's avatar
      Tweak spelling. · 030e2f8f
      Andrew Trick authored
      llvm-svn: 159889
      030e2f8f
  24. Jul 05, 2012
  25. Jul 03, 2012
  26. Jun 28, 2012
    • Jack Carter's avatar
      The ELF relocation record format is different for N64 · 8ad0c272
      Jack Carter authored
      which many Mips 64 ABIs use than for O64 which many 
      if not all other target ABIs use.
      
      Most architectures have the following 64 bit relocation record format:
      
        typedef struct
        {
          Elf64_Addr   r_offset; /* Address of reference */
          Elf64_Xword  r_info;   /* Symbol index and type of relocation */
        } Elf64_Rel;
      
        typedef struct
        {
          Elf64_Addr    r_offset;
          Elf64_Xword   r_info;
          Elf64_Sxword  r_addend;
        } Elf64_Rela;
      
      Whereas N64 has the following format:
      
        typedef struct
        {
          Elf64_Addr    r_offset;/* Address of reference */
          Elf64_Word  r_sym;     /* Symbol index */
          Elf64_Byte  r_ssym;    /* Special symbol */
          Elf64_Byte  r_type3;   /* Relocation type */
          Elf64_Byte  r_type2;   /* Relocation type */
          Elf64_Byte  r_type;    /* Relocation type */
        } Elf64_Rel;
      
        typedef struct
        {
          Elf64_Addr    r_offset;/* Address of reference */
          Elf64_Word  r_sym;     /* Symbol index */
          Elf64_Byte  r_ssym;    /* Special symbol */
          Elf64_Byte  r_type3;   /* Relocation type */
          Elf64_Byte  r_type2;   /* Relocation type */
          Elf64_Byte  r_type;    /* Relocation type */
          Elf64_Sxword  r_addend;
        } Elf64_Rela;
      
      The structure is the same size, but the r_info data element 
      is now 5 separate elements. Besides the content aspects, 
      endian byte reordering will be different for the area with 
      each element being endianized separately.
      
      I treat this as generic and continue to pass r_type as 
      an integer masking and unmasking the byte sized N64 
      values for N64 mode. I've implemented this and it causes no 
      affect on other current targets.
      
      This passes make check.
      
      Jack
      
      llvm-svn: 159299
      8ad0c272
  27. Jun 22, 2012
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