and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.

llvm-svn: 55156

to different address spaces.  This alters the naming scheme for those
intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32

llvm-svn: 54195

- Add "Commutative" property to intrinsics. This allows tblgen to generate the commuted variants for dagisel matching code.
- Mark lots of X86 intrinsics as "Commutative" to allow load folding.

llvm-svn: 52353

and better control the abstraction.  Rename the type
to MVT.  To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits().  Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).

llvm-svn: 52044

CodeGenDAGPatterns, where it can be used in other tablegen backends.
This allows the inference to be done for DAGISelEmitter so that it
gets accurate mayLoad/mayStore/isSimpleLoad flags. 

This brings MemOperand functionality back to where it was before
48329. However, it doesn't solve the problem of anonymous patterns
which expand to code that does loads or stores.

llvm-svn: 49123

were being pruned in patterns where a variable was used more than once, e.g.:

  (or (and R32C:$rA, R32C:$rC), (and R32C:$rB, (not R32C:$rC)))

In this example, $rC is used more than once and is actually significant to
instruction selection pattern matching when commuted variants are produced.
This patch scans the pattern's clauses and collects the variables, creating
a set of variables that are used more than once. TreePatternNode::isIsomorphicTo()
also understands that multiply-used variables are significant.

llvm-svn: 47950

llvm-svn: 46901

intrinsic that writes to memory.

llvm-svn: 45650

llvm-svn: 45646

llvm-svn: 45641

The only difference in output is that we now print them in alphabetical 
order instead of reverse alphabetical order.

llvm-svn: 45635

llvm-svn: 45634

llvm-svn: 45633

Split the pattern parsing code out from the dag isel emitter into it's own file.

No functionality change.

llvm-svn: 45632