llvm-svn: 694

the BasicBlock class where they should be.  pred_begin/pred_end become methods on BasicBlock,
and the cfg namespace isn't used anymore.

llvm-svn: 691

llvm-svn: 688

(1) Avoid hard-coding some register numbers.
(2) Fix some incorrect branch opcodes.
(3) Don't try to move int register to float register!
(4) If an operand being forwarded is a constant and it doesn't fit
    into the immed field of the copy machine instruction, then
    generate a load-constant instead of a copy.
(5) Use (unsigned long) 0 for copying a pointer via "add 0, ptr -> ptr2".

llvm-svn: 683

llvm-svn: 682

llvm-svn: 681

llvm-svn: 680

llvm-svn: 679

(1) Ensure that delay slot instructions are not moved out of place (this
    was happening for some CALL instructions).  Basically, we need to
    move all delay slot instructions out of the graph and handle them
    along with the delayed control transfer instruction.
(2) Mark scheduled instructions correctly when instructions are scheduled
    in more than one cycle in a single step (due to delay slots).

llvm-svn: 678

llvm-svn: 677

(1) Add edges for Values that are written by multiple m/c instructions
(2) Add edges for LLVM operands that are not machine operands (e.g., Call args)

llvm-svn: 676

llvm-svn: 675

llvm-svn: 673

llvm-svn: 671

llvm-svn: 670

bytecode reader.

llvm-svn: 668

llvm-svn: 667

llvm-svn: 665

llvm-svn: 664

* Ignore %xcc argument on conditional branches

llvm-svn: 663

llvm-svn: 662

llvm-svn: 660

llvm-svn: 657

llvm-svn: 656

llvm-svn: 652

llvm-svn: 651

llvm-svn: 650

Clean up extra debug info that wasn't guarded

llvm-svn: 647

llvm-svn: 646

* Spell PhyRegAlloc right.

llvm-svn: 645

Move contents of SparcMachineInstrDesc[] out of SparcInternals.h
into Sparc.cpp

llvm-svn: 644

llvm-svn: 643

llvm-svn: 642

llvm-svn: 637

llvm-svn: 636

llvm-svn: 635

llvm-svn: 634

llvm-svn: 632

llvm-svn: 631

llvm-svn: 630