- Apr 24, 2012
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Andrew Trick authored
llvm-svn: 155486
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Nadav Rotem authored
Fix 12592. Patch by Matt Pharr. llvm-svn: 155480
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Nadav Rotem authored
llvm-svn: 155477
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Nadav Rotem authored
llvm-svn: 155475
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Evan Cheng authored
MachineBasicBlock::SplitCriticalEdge() should follow LLVM IR variant and refuse to break edge to EH landing pad. rdar://11300144 llvm-svn: 155470
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Lang Hames authored
<rdar://problem/11291436>. llvm-svn: 155468
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Chandler Carruth authored
constants in C++11 mode. I have no idea why it required such particular circumstances to get here, the code seems clearly to rely upon unchecked assumptions. Specifically, when we decide to form an index into a struct type, we may have gone through (at least one) zero-length array indexing round, which would have left the offset un-adjusted, and thus not necessarily valid for use when indexing the struct type. This is just an canonicalization step, so the correct thing is to refuse to canonicalize nonsensical GEPs of this form. Implemented, and test case added. Fixes PR12642. Pair debugged and coded with Richard Smith. =] I credit him with most of the debugging, and preventing me from writing the wrong code. llvm-svn: 155466
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Jim Grosbach authored
r154362 was supposed to delete this bit, but obviously didn't. rdar://11305594 llvm-svn: 155465
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Stepan Dyatkovskiy authored
Related to PR1255. Let's begin. I'll commit classes that corresponds to our latest PR1255 discussion posts in llvm-commits. Strategy. 0. Implement new classes. Classes doesn't affect anything. They still work with ConstantInt base values at this stage. 1. Fictitious replacement of current ConstantInt case values with ConstantRangesSet. Case ranges set will still hold single value, and ConstantInt *getCaseValue() will return it. But additionally implement new method in SwitchInst that allows to work with case ranges. Currenly I think it should be some wrapper that returns either single value or ConstantRangesSet object. 2. Step-by-step replacement of old "ConstantInt* getCaseValue()" with new alternative. Modify algorithms for all passes that works with SwitchInst. But don't modify LLParser and BitcodeReader/Writer. Still hold single value in each ConstantRangesSet object. On this stage some parts of LLVM will use old-style methods, and some ones new-style. 3. After all getCaseValue() usages will removed and whole LLVM and its clients will work in new style - modify LLParser, Reader and Writer. Remove getCaseValue(). 4. Replace ConstantInt*-based case ranges set items with APInt ones. Currently we are on Zero Stage: New classes. ConstantRangesSet. I selected ConstantArrays as case ranges set "holder" object (it is a temporary decision, I'll explain why below). The array items are may be ConstantVectors with single item, and ConstantVectors with two items (that means single number and range respectively). The ConstantInt will used as basic value representation. It will replaced with APInt then. Of course ConstantArray and ConstantVector will go away after ConstantInt => APInt replacement. New class mandatory features: - bool isSatisfies(ConstantInt *V) method (need better name?). Returns true if the given value satisfies this case. - Case's ranges and values enumeration. In some passes we need to analize each case (SwitchLowering for example). Factory + unified clusterify. I also propose to implement the factory that allows to build case object with user friendly way. I called it CRSBuilder by now. Currenly I implemented the factory that allows add,remove pairs of range+successor. It also allows add existing ConstantRangesSet decompiling it to separated ranges. Factory can emit either clusters set (single case range + successor) or the set of "ConstantRangesSet + Successor" pairs. So you can use it either as builder for new cases set for SwitchInst, or for clusterification of existing cases set. Just call Factory.optimize() and it emits optimized and sorted clusters collection for you! I tested clusterification on SelectionDAGBuilder - it works fine. Don't worry it was not included in this patch. Just new classes. Factory is a template. There are two params: SuccessorClass and IsReadonly. So you can specify what successor you need (BB or MBB). And you can also restrict your factory to use values in read-only mode (SelectionDAGBuilder need IsReadonly=true). Read-only factory couldn't build the cases ranges. llvm-svn: 155464
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Nadav Rotem authored
Remove the v2f64 patterns because it does not match any vbroadcast instruction. llvm-svn: 155461
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Andrew Trick authored
llvm-svn: 155460
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Andrew Trick authored
llvm-svn: 155459
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Andrew Trick authored
llvm-svn: 155458
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Andrew Trick authored
llvm-svn: 155457
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Andrew Trick authored
The DAG builder is a convenient place to do it. Hopefully this is more efficient than a separate traversal over the same region. llvm-svn: 155456
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Andrew Trick authored
MachineInstr sequence. This uses the new target interface for tracking register pressure using pressure sets to model overlapping register classes and subregisters. RegisterPressure results can be tracked incrementally or stored at region boundaries. Global register pressure can be deduced from local RegisterPressure results if desired. This is an early, somewhat untested implementation. I'm working on testing it within the context of a register pressure reducing MachineScheduler. llvm-svn: 155454
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Kevin Enderby authored
instructions. llvm-svn: 155453
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Kevin Enderby authored
instructions. llvm-svn: 155444
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Nadav Rotem authored
immediate. We can't use it here because the shuffle code does not check that the lower part of the word is identical to the upper part. llvm-svn: 155440
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Richard Barton authored
llvm-svn: 155439
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Nadav Rotem authored
using the pattern (vbroadcast (i32load src)). In some cases, after we generate this pattern new users are added to the load node, which prevent the selection of the blend pattern. This commit provides fallback patterns which perform in-vector broadcast (using in-vector vbroadcast in AVX2 and pshufd on AVX1). llvm-svn: 155437
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Bill Wendling authored
Look for the 'Is Simulated' module flag. This indicates that the program is compiled to run on a simulator. llvm-svn: 155435
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Bill Wendling authored
llvm-svn: 155434
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Bill Wendling authored
llvm-svn: 155433
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Bill Wendling authored
llvm-svn: 155432
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Craig Topper authored
llvm-svn: 155429
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Craig Topper authored
llvm-svn: 155428
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Evan Cheng authored
llvm-svn: 155402
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Jim Grosbach authored
llvm-svn: 155399
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- Apr 23, 2012
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Nadav Rotem authored
Optimize the vector UINT_TO_FP, SINT_TO_FP and FP_TO_SINT operations where the integer type is i8 (commonly used in graphics). llvm-svn: 155397
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Preston Gurd authored
on X86 Atom. Some of our tests failed because the tail merging part of the BranchFolding pass was creating new basic blocks which did not contain live-in information. When the anti-dependency code in the Post-RA scheduler ran, it would sometimes rename the register containing the function return value because the fact that the return value was live-in to the subsequent block had been lost. To fix this, it is necessary to run the RegisterScavenging code in the BranchFolding pass. This patch makes sure that the register scavenging code is invoked in the X86 subtarget only when post-RA scheduling is being done. Post RA scheduling in the X86 subtarget is only done for Atom. This patch adds a new function to the TargetRegisterClass to control whether or not live-ins should be preserved during branch folding. This is necessary in order for the anti-dependency optimizations done during the PostRASchedulerList pass to work properly when doing Post-RA scheduling for the X86 in general and for the Intel Atom in particular. The patch adds and invokes the new function trackLivenessAfterRegAlloc() instead of using the existing requiresRegisterScavenging(). It changes BranchFolding.cpp to call trackLivenessAfterRegAlloc() instead of requiresRegisterScavenging(). It changes the all the targets that implemented requiresRegisterScavenging() to also implement trackLivenessAfterRegAlloc(). It adds an assertion in the Post RA scheduler to make sure that post RA liveness information is available when it is needed. It changes the X86 break-anti-dependencies test to use –mcpu=atom, in order to avoid running into the added assertion. Finally, this patch restores the use of anti-dependency checking (which was turned off temporarily for the 3.1 release) for Intel Atom in the Post RA scheduler. Patch by Andy Zhang! Thanks to Jakob and Anton for their reviews. llvm-svn: 155395
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Jim Grosbach authored
llvm-svn: 155393
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Jim Grosbach authored
llvm-svn: 155392
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Jim Grosbach authored
llvm-svn: 155391
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Jim Grosbach authored
llvm-svn: 155390
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Jim Grosbach authored
llvm-svn: 155389
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Jim Grosbach authored
llvm-svn: 155387
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Michael J. Spencer authored
When building LLVM on Linux with libc++ with CMake TIME_WITH_SYS_TIME is undefined, and HAVE_SYS_TIME_H is defined. This ends up including sys/time.h but not time.h. Unix/TimeValue.inc requires time.h for asctime_r and localtime. libstdc++ seems to include time.h anyway, but libc++ does not. Fix this by always including time.h llvm-svn: 155382
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Eric Christopher authored
find forward declarations in the context that the actual definition will occur. rdar://11291658 llvm-svn: 155380
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Chandler Carruth authored
the stated developer policy. llvm-svn: 155373
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