- Mar 10, 2011
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Jakob Stoklund Olesen authored
This makes it possible to register delegates and get callbacks when the spiller edits live ranges. llvm-svn: 127389
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Jakob Stoklund Olesen authored
llvm-svn: 127388
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Francois Pichet authored
llvm-svn: 127383
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Stuart Hastings authored
llvm-svn: 127382
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Devang Patel authored
Introduce DebugInfoProbe. This is used to monitor how llvm optimizer is treating debugging information. It generates output that lools like 8 times line number info lost by Scalar Replacement of Aggregates (SSAUp) 1 times line number info lost by Simplify well-known library calls 12 times variable info lost by Jump Threading llvm-svn: 127381
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Evan Cheng authored
llvm-svn: 127380
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Evan Cheng authored
llvm-svn: 127376
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- Mar 09, 2011
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Evan Cheng authored
flexible. If it returns a register class that's different from the input, then that's the register class used for cross-register class copies. If it returns a register class that's the same as the input, then no cross- register class copies are needed (normal copies would do). If it returns null, then it's not at all possible to copy registers of the specified register class. llvm-svn: 127368
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Benjamin Kramer authored
llvm-svn: 127365
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Devang Patel authored
llvm-svn: 127362
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Johnny Chen authored
The insufficient encoding information of the combined instruction confuses the decoder wrt UQADD16. Add extra logic to recover from that. Fixed an assert reported by Sean Callanan llvm-svn: 127354
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Eric Christopher authored
command line, they'll still be seen with -help-hidden. llvm-svn: 127353
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Devang Patel authored
llvm-svn: 127352
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Jakob Stoklund Olesen authored
The damage done by physreg coalescing only depends on the number of instructions the extended physreg live range covers. This fixes PR9438. The heuristic is still luck-based, and physreg coalescing really should be disabled completely. We need a register allocator with better hinting support before that is possible. Convert a test to FileCheck and force spilling by inserting an extra call. The previous spilling behavior was dependent on misguided physreg coalescing decisions. llvm-svn: 127351
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Bruno Cardoso Lopes authored
llvm-svn: 127349
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Andrew Trick authored
This helps cases like 2008-07-19-movups-spills.ll, but doesn't have an obvious impact on benchmarks llvm-svn: 127347
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Jan Sjödin authored
Add createELFObjectTargetWriter method to TargetAsmBackend, which enables construction of non-standard ELFObjectWriters that can be used in MCJIT. llvm-svn: 127346
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Jan Sjödin authored
llvm-svn: 127343
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Andrew Trick authored
When ExactBECount is a constant, use it for MaxBECount. When MaxBECount cannot be computed, replace it with ExactBECount. Fixes PR9424. llvm-svn: 127342
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Andrew Trick authored
llvm-svn: 127340
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Benjamin Kramer authored
llvm-svn: 127335
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Benjamin Kramer authored
llvm-svn: 127331
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NAKAMURA Takumi authored
llvm-svn: 127328
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Nick Lewycky authored
Thanks Duncan Sands! llvm-svn: 127323
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Cameron Zwarich authored
alloca as both integer and floating-point vectors of the same size. Bugpoint is not cooperating with me, but I'll try to find a manual testcase tomorrow. llvm-svn: 127320
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Nick Lewycky authored
gave up when I realized I couldn't come up with a good name for what the refactored function would be, to describe what it does. This is PR9343 test12, which is test3 with arguments reordered. Whoops! llvm-svn: 127318
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Cameron Zwarich authored
a union of a float, <2 x float>, and <4 x float>. This mostly comes up with the use of vector intrinsics, especially in NEON when programmers know the layout of the register file. This enables codegen to eliminate a lot of the subregister traffic it would otherwise generate. This commit only enables this for a small number of floating-point cases, but a lot more integer cases. I assume this is okay for all ports, but I did not do extensive testing of the quality of code involving i512 vectors and the like. If there is a use case where this generates worse code than before, let me know and we can scale it back. This fixes <rdar://problem/9036264>. llvm-svn: 127317
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Cameron Zwarich authored
more complicated. llvm-svn: 127316
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Matt Beaumont-Gay authored
llvm-svn: 127311
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Eli Friedman authored
INT_MIN % -1. llvm-svn: 127306
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Jakob Stoklund Olesen authored
This will we used for keeping register allocator data structures up to date while LiveRangeEdit is trimming live intervals. llvm-svn: 127300
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Eli Friedman authored
reachable uses, but there still might be uses in dead blocks. Use the standard solution of replacing all the uses with undef. This is a rare case because it's very sensitive to phase ordering in SimplifyCFG. llvm-svn: 127299
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Bill Wendling authored
* Add tests for VSRI and VSLI. llvm-svn: 127297
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Jakob Stoklund Olesen authored
llvm-svn: 127295
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Bill Wendling authored
llvm-svn: 127294
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Bill Wendling authored
* Update the NEON shift instruction test to expect what 'as' produces. llvm-svn: 127293
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- Mar 08, 2011
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Jakob Stoklund Olesen authored
LiveRangeEdit::eliminateDeadDefs() will eventually be used by coalescing, splitting, and spilling for dead code elimination. It can delete chains of dead instructions as long as there are no dependency loops. llvm-svn: 127287
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Devang Patel authored
llvm-svn: 127282
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Jakob Stoklund Olesen authored
Patch by Olaf Krzikalla! llvm-svn: 127264
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