- Jan 09, 2012
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Andrew Trick authored
llvm-svn: 147785
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Kostya Serebryany authored
llvm-svn: 147784
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Richard Smith authored
Thanks to David Blaikie for pointing this out. llvm-svn: 147783
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Douglas Gregor authored
the anonymous namespace to its parent. Semantically, this means that the anonymous namespaces defined in one module are distinct from the anonymous namespaces defined in another module. llvm-svn: 147782
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Devang Patel authored
Patch by Joe Groff! llvm-svn: 147781
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Douglas Gregor authored
that we can merge, for example, two occurrences of namespace N { void f(); } in two disjoint modules. llvm-svn: 147780
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Benjamin Kramer authored
llvm-svn: 147779
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Douglas Gregor authored
modules. Teach name lookup into namespaces to search in each of the merged DeclContexts as well as the (now-primary) DeclContext. This supports the common case where two different modules put something into the same namespace. llvm-svn: 147778
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Benjamin Kramer authored
This subsumes several other transforms while enabling us to catch more cases. llvm-svn: 147777
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Howard Hinnant authored
llvm-svn: 147776
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Douglas Gregor authored
is important because it's fairly common for headers (especially system headers) to want to provide only those typedefs needed for that particular header, based on some guard macro, e.g., #ifndef _SIZE_T #define _SIZE_T typedef long size_t; #endif which is repeated in a number of headers. The guard macro protects against duplicate definitions. However, this means that only the first occurrence of this pattern actually defines size_t, so the submodule corresponding to this header has the only visible definition. If a user then imports a different submodule from the same module, size_t will be known but not visible, and therefore cannot be used. By allowing redefinition of typedefs, each header that wants to define size_t can do so independently, so it will be available in the corresponding submodules. llvm-svn: 147775
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Abramo Bagnara authored
llvm-svn: 147774
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Chandler Carruth authored
this substraction will result in small negative numbers at worst which become very large positive numbers on assignment and are thus caught by the <=4 check on the next line. The >0 check clearly intended to catch these as negative numbers. Spotted by inspection, and impossible to trigger given the shift widths that can be used. llvm-svn: 147773
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Chandler Carruth authored
llvm-svn: 147772
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Craig Topper authored
llvm-svn: 147771
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Craig Topper authored
Remove AVX hack in X86Subtarget. AVX/AVX2 are now treated as an SSE level. Predicate functions have been altered to maintain previous names and behavior. llvm-svn: 147770
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Craig Topper authored
llvm-svn: 147769
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Craig Topper authored
Reorder a bunch of patterns to put the AVX version first thus giving it priority over the SSE version. Another step towards trying to remove the AVX hack that disables SSE from X86Subtarget. llvm-svn: 147768
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Craig Topper authored
Clean up patterns for MOVNT*. Not sure why there were floating point types on MOVNTPS and MOVNTDQ. And v4i64 was completely missing. llvm-svn: 147767
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Craig Topper authored
Mark MOVNTI as being supported in SSE2 OR AVX mode. This instruction has no AVX equivalent so we should use the SSE version. llvm-svn: 147766
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Craig Topper authored
Move SSE2 logical operations PAND/POR/PXOR/PANDN above SSE1 logical operations ANDPS/ORPS/XORPS/ANDNPS. This fixes a pattern ordering issue that meant that the SSE2 instructions could never be directly selected since the SSE1 patterns would always match first. This is largely moot with the ExeDepsFix pass, but I'm trying to audit for all such ordering issues. llvm-svn: 147765
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Craig Topper authored
Change some places that were checking for AVX OR SSE1/2 to use hasXMM/hasXMMInt instead. Also fix one place that checked SSE3, but accidentally excluded AVX to use hasSSE3orAVX. This is a step towards removing the AVX hack from the X86Subtarget.h llvm-svn: 147764
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Rafael Espindola authored
llvm-svn: 147763
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Craig Topper authored
Don't disable MMX support when AVX is enabled. Fix predicates for MMX instructions that were added along with SSE instructions to check for AVX in addition to SSE level. llvm-svn: 147762
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Howard Hinnant authored
First brush with testing __gxx_personality_v0 reveals there is still a long way to go. But my understanding of what it is supposed to do continues to improve. I am currently contemplating whether I need to implement typeinfo before completing __gxx_personality_v0 in order to get matching catch handlers correct. llvm-svn: 147761
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Howard Hinnant authored
Add a few TODO's and FIXME's. Making notes as I go along, but not slowing down to fix these yet. Just don't want anything to fall through the cracks. llvm-svn: 147760
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Howard Hinnant authored
Correct comment regarding members of __cxa_dependent_exception. Actually it is useful to disguise a __cxa_dependent_exception as a __cxa_exception by filling in most (not all) of these members at __cxa_dependent_exception construction time. That way most routines don't have to care which kind of exception they have. llvm-svn: 147759
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Craig Topper authored
llvm-svn: 147758
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- Jan 08, 2012
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Peter Collingbourne authored
llvm-svn: 147757
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Peter Collingbourne authored
llvm-svn: 147756
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Peter Collingbourne authored
llvm-svn: 147755
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Benjamin Kramer authored
We still save an instruction when just the "and" part is replaced. Also change the code to match comments more closely. llvm-svn: 147753
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Evan Cheng authored
llvm-svn: 147752
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Evan Cheng authored
safely proven not to have been clobbered. No small test case possible. llvm-svn: 147751
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Fariborz Jahanian authored
c++ object properties. wip. llvm-svn: 147750
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Benjamin Kramer authored
InstCombine: If we have a bit test and a sign test anded/ored together, merge the sign bit into the bit test. This is common in bit field code, e.g. checking if the first or the last bit of a bit field is set. llvm-svn: 147749
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Victor Umansky authored
llvm-svn: 147748
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rdar://problem/10645694Greg Clayton authored
Fixed an ARM backtracing issue where if the previous frame was a thumb function and it was a tail call so that the current frame returned to an address that would fall into the next function, we would use the next function as the basis for how we unwound the previous frame's registers and of course get things wrong. We now fix the PC code address using the current ABI plug-in, and the ARM ABI plug-in has been modified to correctly fix the code address. So when we do the symbol context lookup, instead of taking an address like 0x1001 and decrementing 1, and looking up the symbol context for a frame, we now correctly fix 0x1001 to 0x1000, then decrement that by 1 to get the correct symbol context. I added a bunch more logging to "log enable lldb uwnind" to help us in the future. We now log the PC, FP and SP (if they are available), and we also dump the "active_row" that we find for unwinding a frame. llvm-svn: 147747
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rdar://problem/10660369Greg Clayton authored
Fixed the default ARM regiter set to be able to refer to "r7" as "fp" for the apple debugserver. llvm-svn: 147746
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Rafael Espindola authored
llvm-svn: 147745
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