instead of EVTs.

llvm-svn: 170538

MVTs, instead of EVTs.

llvm-svn: 170537

from EVT.

llvm-svn: 170536

EVTs.

llvm-svn: 170535

EVTs.

llvm-svn: 170534

getIndexedStoreAction, and addRegisterClass to take and MVT, instead
of EVT.

llvm-svn: 170533

of EVT.

llvm-svn: 170532

This changes adds shadow and origin propagation for unknown intrinsics
by examining the arguments and ModRef behaviour. For now, only 3 classes
of intrinsics are handled:
- those that look like simple SIMD store
- those that look like simple SIMD load
- those that don't have memory effects and look like arithmetic/logic/whatever
  operation on simple types.

llvm-svn: 170530

instead of EVTs.

llvm-svn: 170529

MapVector is a bit heavyweight, but I don't see a simpler way. Also the
InductionList is unlikely to be large. This should help 3-stage selfhost
compares (PR14647).

llvm-svn: 170528

llvm-svn: 170527

llvm-svn: 170524

llvm-svn: 170523

EVT.

llvm-svn: 170522

llvm-svn: 170518

llvm-svn: 170517

Inline the 'hasIncompatibleWithVarArgsAttrs' method into its only uses. And some minor comment reformatting.

llvm-svn: 170516

llvm-svn: 170513

llvm-svn: 170510

llvm-svn: 170509

llvm-svn: 170506

bitwidth op back to the original size. If we reduce ANDs then this can cause
an endless loop. This patch changes the ZEXT to ANY_EXTEND if the demanded bits
are equal or smaller than the size of the reduced operation.

llvm-svn: 170505

llvm-svn: 170504

llvm-svn: 170503

Rename the 'Attributes' class to 'Attribute'. It's going to represent a single attribute in the future.

llvm-svn: 170502

llvm-svn: 170497

llvm-svn: 170496

Teach SimplifySetCC that comparing AssertZext i1 against a constant 1 can be rewritten as a compare against a constant 0 with the opposite condition.

llvm-svn: 170495

llvm-svn: 170493

llvm-svn: 170486

instructions in the assembly code variant if one exists.

The intended use for this is so tools like lldb and darwin's otool(1)
can be switched to print Intel-flavored disassembly.

I discussed extensively this API with Jim Grosbach and we feel
while it may not be fully general, in reality there is only one syntax
for each assembly with the exception of X86 which has exactly
two for historical reasons.

rdar://10989182

llvm-svn: 170477

The bundle flags are now maintained by the slightly higher-level
functions bundleWithPred() / bundleWithSucc() which enforce consistent
bundle flags between neighboring instructions.

See also MIBundleBuilder for an even higher-level approach to building
bundles.

llvm-svn: 170475

The bundle_iterator::operator++ function now doesn't need to dig out the
basic block and check against end(). It can use the isBundledWithSucc()
flag to find the last bundled instruction safely.

Similarly, MachineInstr::isBundled() no longer needs to look at
iterators etc. It only has to look at flags.

llvm-svn: 170473

 InstCombine for unsafe floating-point add/sub.

llvm-svn: 170471

Enable the loop vectorizer in clang and not in the pass manager, so that we can disable it in clang.

llvm-svn: 170470

Now that the bundle flag aware APIs are all in place, it is possible to
continuously verify the flag consistency.

llvm-svn: 170465

AVX2 before AVX.

llvm-svn: 170464

The new bidirectional bundle flags are redundant, so inadvertent bundle
tearing can be detected in the machine code verifier.

llvm-svn: 170463

To not over constrain the scheduler for ARM in thumb mode, some optimizations  for code size reduction, specific to ARM thumb, are blocked when they add a dependency (like write after read dependency).

Disables this check when code size is the priority, i.e., code is compiled with -Oz.

llvm-svn: 170462

The bundle-related MI flags need to be kept in sync with the neighboring
instructions. Don't allow the bulk flag-setting setFlags() function to
change them.

Also don't copy MI flags when cloning an instruction. The clone's bundle
flags will be set when it is explicitly inserted into a bundle.

llvm-svn: 170459