Windows and Mac OS X.  Will investigate later.

llvm-svn: 97016

apply it only to the function itself, and never to the return type. Fixes part
of PR6408.

llvm-svn: 97015

analysis needs this.

llvm-svn: 97014

llvm-svn: 97013

Machine instruction selection is much happier when operands are in virtual
registers.

llvm-svn: 97012

llvm-svn: 97011

argument is non-null, pass it along to PHITranslateSubExpr so that it can
prefer using existing values that dominate the PredBB, instead of just
blindly picking the first equivalent value that it finds on a uselist.
Also when the DominatorTree is specified, have PHITranslateValue filter
out any result that does not dominate the PredBB.  This is basically just
refactoring the check that used to be in GetAvailablePHITranslatedSubExpr
and also in GVN.

Despite my initial expectations, this change does not affect the results
of GVN for any testcases that I could find, but it should help compile time.
Before this change, if PHITranslateSubExpr picked a value that does not
dominate, PHITranslateWithInsertion would then insert a new value, which GVN
would later determine to be redundant and would replace.  By picking a good
value to begin with, we save GVN the extra work of inserting and then
replacing a new value.

llvm-svn: 97010

llvm-svn: 97009

a block pointer type. Fixes radar 7682149.

llvm-svn: 97008

instead of %AL/%AH.

llvm-svn: 97006

llvm-svn: 97005

single use.

llvm-svn: 97003

llvm-svn: 97002

creating a new node then replacing uses.

llvm-svn: 97000

llvm-svn: 96999

llvm-svn: 96998

llvm-svn: 96995

Previously, LiveIntervalAnalysis would infer phi joins by looking for multiply
defined registers. That doesn't work if the phi join is implicitly defined in
all but one of the predecessors.

llvm-svn: 96994

Add support for the weakref attribute. We still produce "alias weak" as llvm-gcc does, but are more strict on what uses of weakref we accept.

llvm-svn: 96992

llvm-svn: 96990

of the block descriptor field.  This field is the ObjC style @encode
signature of the implementation function, and was to this point
conditionally provided in the block literal data structure.  That
provisional support is removed.

Additionally, eliminate unused enumerations for the block literal flags field.
The first shipping ABI unconditionally set (1<<29) but this bit is unused
by the runtime, so the second ABI will unconditionally have (1<<30) set so
that the runtime can in fact distinguish whether the additional data is
present or not.

llvm-svn: 96989

With the compiler changed to use EmitCodeAlignment() it does change the
functionality.  But X86 assembly code assembled with llvm-mc does not change
its output.  For that we will eventually change the assembler frontend to
detect a '.align x, 0x90' when used in a section that 'hasInstructions' and use
EmitCodeAlignment, but will wait until we have better target hooks.

llvm-svn: 96988

rewriting problem. Fixes radar 7680953.

llvm-svn: 96987

pointer (for defensive programming).  This matches the behavior with
assigning NULL to a regular pointer.  Fixes <rdar://problem/7631278>.

llvm-svn: 96985

llvm-svn: 96983

llvm-svn: 96981

three or four registers and VLD2 (multiple two-element structures) which loads
memory into two double-spaced registers.

A8.6.307 & A8.6.310

llvm-svn: 96980

llvm-svn: 96978

llvm-svn: 96977

that refer to an undefined class.

llvm-svn: 96976

llvm-svn: 96975

disables load folding at -O0.

llvm-svn: 96973

no id's would cause early exit allowing IsLegalToFold to return true
instead of false, producing a cyclic dag.

This was striking the new isel because it isn't using SelectNodeTo yet,
which theoretically is just an optimization.

llvm-svn: 96972

llvm-svn: 96971

the result is integral.  Fixes <rdar://problem/7676608>.

llvm-svn: 96970

The MicroBlaze is a highly configurable 32-bit soft-microprocessor for
use on Xilinx FPGAs. For more information see:
http://www.xilinx.com/tools/microblaze.htm
http://en.wikipedia.org/wiki/MicroBlaze

The current LLVM MicroBlaze backend generates assembly which can be
compiled using the an appropriate binutils assembler.

llvm-svn: 96969

llvm-svn: 96968

segment.

llvm-svn: 96967

so that it doesn't break them when the code generator starts using it.

llvm-svn: 96966

llvm-svn: 96965