llvm-svn: 26935

llvm-svn: 26933

- Each scalar to vector v8i16 and v16i8 is a any_extend followed by a movd.

llvm-svn: 26932

llvm-svn: 26930

llvm-svn: 26926

llvm-svn: 26924

       lwz r2, 8(0)
instead of this:
       lwz r2, 8(r0)

This fixes the llc/llc-beta failures on PPC last night.

llvm-svn: 26922

llvm-svn: 26921

llvm-svn: 26920

- Handle FR32 to VR128:v4f32 and FR64 to VR128:v2f64 with aliases of MOVAPS
and MOVAPD. Mark them as move instructions and *hope* they will be deleted.

llvm-svn: 26919

llvm-svn: 26917

llvm-svn: 26913

llvm-svn: 26912

llvm-svn: 26911

llvm-svn: 26910

disp field of the load/store if possible.  This compiles
CodeGen/PowerPC/load-constant-addr.ll to:

_test:
        lis r2, 2838
        lfs f1, 26848(r2)
        blr

instead of:

_test:
        lis r2, 2838
        ori r2, r2, 26848
        lfs f1, 0(r2)
        blr

llvm-svn: 26908

llvm-svn: 26907

figuring these out! :)

llvm-svn: 26904

llvm-svn: 26902

llvm-svn: 26901

llvm-svn: 26900

constant pool load.  This generates significantly nicer code for splats.

When tblgen gets bugfixed, we can remove the custom selection code.

llvm-svn: 26898

llvm-svn: 26897

llvm-svn: 26896

llvm-svn: 26895

instructions

llvm-svn: 26894

llvm-svn: 26893

llvm-svn: 26891

llvm-svn: 26889

llvm-svn: 26888

TODO: leave specific ones as VECTOR_SHUFFLE's and turn them into specialized
operations like vsplt*

llvm-svn: 26887

llvm-svn: 26886

llvm-svn: 26883

llvm-svn: 26877

llvm-svn: 26874

llvm-svn: 26870

llvm-svn: 26868

llvm-svn: 26865

llvm-svn: 26863

llvm-svn: 26862